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CS61583 датащи(PDF) 31 Page - Cirrus Logic

номер детали CS61583
подробное описание детали  DUAL T1/E1 LINE INTERFACE
PDF  44 Pages
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производитель  CIRRUS [Cirrus Logic]
домашняя страница  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS61583 датащи(HTML) 31 Page - Cirrus Logic

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APPLICATIONS
Line Interface
Figure A1 illustrates a typical connection diagram
and Table A1 lists the external components that
are required in T1 and E1 applications.
In the transmit line interface circuitry, capacitors
C1 and C2 provide transmitter return loss. The
0.47
µF capacitor in series with the transformer
primary prevents output stage imbalances from
producing a DC current through the transformer
that might saturate the transformer and result in
an output level offset.
In the receive line interface circuitry, resistors R1-
R4 provide receive impedance matching and
receiver return loss. The 0.47
µF capacitor to
ground provides the necessary differential input
voltage reference for the receiver.
Power Supply
As shown in Figure A1, the CS61583 operates
from a 5.0 Volt supply. Separate analog and digi-
tal power supply and ground pins provide internal
isolation. The TGND, RGND, and DGND ground
pins must not be more negative than AGND. It is
recommended that all of the supply pins be con-
nected together at the device. A 4.99k
Ω ±1%
AV+ AGND1:2 BGREF
TV+1
TGND1
RV+1 RGND1 DV+ DGND1:3
0.01
µF
TCLK1
TPOS1 (TDATA1)
TNEG1 (AIS1)
RCLK1
RPOS1 (RDATA1)
RNEG1 (BPV1)
TCLK2
TPOS2 (TDATA2)
TNEG2 (AIS2)
RCLK2
RPOS2 (RDATA2)
RNEG2 (BPV2)
Framer
Framer
TTIP1
TRING1
1:1.15
RTIP1
RRING1
TTIP2
TRING2
RTIP2
RRING2
1:1.15
Hardware Control
Power Supply
Clock Generator
Channel 2
Channel 1
transmit
transmit
3
0.1
µF
1
µF
+
0.1
µF
TV+2
TGND2
RV+2
RGND2
22
µF
+
0.1
µF
0.1
µF
0.1
µF
1:1.15
receive
R3
R4
1:1.15
receive
R1
R2
T1
T2
T3
T4
R3
4.99k
Ω
VCC
0.47
µF
0.47
µF
REFCLK 1XCLK RESET
CLKE
TAOS1
LLOOP1
RLOOP1
CON01
CON11
CON21
RLOOP2
LLOOP2
TAOS2
CON02
CON12
CON22
AMI2
AMI1
CODER2
CODER1
ATTEN1
ATTEN2
C1
C2
0.47
µF
0.47
µF
2
Figure A1. Typical Connection Diagram
Data Rate (MHz)
REFCLK Frequency (MHz)
Cable (
Ω)R1-R4 (Ω)
C1-C2 (pF)
1XCLK = 1
1XCLK = 0
1.544
1.544
12.352
100
38.3
220
2.048
2.048
16.384
75
28.7
470
120
45.3
220
Table A1. CS61583 External Components
CS61583
DS172PP5
31



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