CS5541

DS500PP1

5

Notes: 8. See Section

2.1, “Analog Input”.

9. See Section

2.2, “Voltage Reference Input”.

10. VREF must be less than or equal to supply voltages.

11. The CS5541 includes two digital filters. The first filter, which achieves simultaneous rejection of 50/60

Hz, provides single conversion settling at 13.4 SPS throughput or four conversion settling at 53.7 SPS

throughput. The second filter, which achieves 16-bit performance, provides single conversion settling at

64.8 SPS throughput or four conversion settling at 260 SPS throughput.

12. All outputs unloaded. All digital inputs at CMOS levels.

Parameter

Min

Typ

Max

Units

Analog Inputs

Common Mode + Signal on AIN+ or AIN-

(Bipolar/Unipolar Mode)

Single Supply

Dual Supply

0.0

VA-

-

-

VA+

VA+

V

V

CVF Current on AIN+, AIN-

(Note 8)

-

12

-

nA

Input Leakage for MUX when off

-

10

-

pA

Common Mode Rejection

dc

50, 60Hz

-

-

120

120

-

-

dB

dB

Input Capacitance

-

8

-

pF

Voltage Reference Inputs

Range

(VREF+) - (VREF-)

(Note 10)

0.1

2.5

(VA+) -

(VA-)

V

CVF Current on VREF+ and VREF-

(Note 9)

-

20

-

nA

Common Mode Rejection

dc

50, 60 Hz

-

-

120

120

-

-

dB

dB

Input Capacitance

-

12

-

pF

Dynamic Characteristics

Modulator Sampling Frequency

-

MCLK/2

-

Hz

Filter Settling to 1/2 LSB (Full Scale Step)

(Note 11)

13.4 SPS OWR

53.7 SPS OWR

64.8 SPS OWR

260 SPS OWR

-

-

-

1/OWR

4/OWR

1/OWR

4/OWR

-

-

-

-

s

s

s

s

Power Supplies

DC Power Supply Currents

(Normal Mode)

-

-

225

25

280

36

µA

µA

Power Consumption

Normal Mode

(Note 12)

Standby Mode

Sleep Mode

-

-

-

750

75

30

1000

-

-

µW

µW

µW

Power Supply Rejection

dc Positive Supplies

dc Negative Supply

-

-

80

80

-

-

dB

dB