I

=

OUT(t)

C

OUT

OUT

´ dV

(t)

dt

V

R

LOAD

+

IN

OUT

GND

EN

DNC

TLV759P

V

OUT

V

IN

FB

C

IN

C

OUT

V

EN

R

2

R

1

20

TLV752

SBVS383 – DECEMBER 2019

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Copyright © 2019, Texas Instruments Incorporated

8.2 Typical Application

Figure 44 shows the typical application circuit for the TLV752. Input and output capacitances must be at least

1 µF.

Figure 44. TLV752 Typical Application

8.2.1 Design Requirements

Use the parameters listed in Table 2 for typical linear regulator applications.

Table 2. Design Parameters

PARAMETER

DESIGN REQUIREMENT

Input voltage

3.8 V

Output voltage

3.3 V, ±1%

Input current

1 A (maximum)

Output load

1-A dc

Maximum ambient temperature

70°C

8.2.2 Detailed Design Procedure

Input and output capacitors are required to achieve the output voltage transient requirements. Capacitance

values of 2.2 µF are selected to give the maximum output capacitance in a small, low-cost package; see the

Input and Output Capacitor Selection section for details.

Figure 40 illustrates the output voltage of the TLV752. Set the output voltage using the resistor divider.

8.2.2.1 Input Current

During normal operation, the input current to the LDO is approximately equal to the output current of the LDO.

During startup, the input current is higher as a result of the inrush current charging the output capacitor. Use

Equation 6 to calculate the current through the input.

where:

•

•

•

(6)

8.2.2.2 Thermal Dissipation

(7)

(8)