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PCI6621 датащи(PDF) 55 Page - Texas Instruments |
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PCI6621 датащи(HTML) 55 Page - Texas Instruments |
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55 / 204 page ![]() 3−7 Table 3−4. TPS2226 Control Logic—xVPP AVPP CONTROL SIGNALS OUTPUT V_AVPP BVPP CONTROL SIGNALS OUTPUT V_BVPP D8(SHDN) D0 D1 D9 OUTPUT V_AVPP D8(SHDN) D4 D5 D10 OUTPUT V_BVPP 1 0 0 X 0 V 1 0 0 X 0 V 1 0 1 0 3.3 V 1 0 1 0 3.3 V 1 0 1 1 5 V 1 0 1 1 5 V 1 1 0 X 12 V 1 1 0 X 12 V 1 1 1 X Hi-Z 1 1 1 X Hi-Z 0 X X X Hi-Z 0 X X X Hi-Z Table 3−5. TPS2226 Control Logic—xVCC AVCC CONTROL SIGNALS OUTPUT V_AVCC BVCC CONTROL SIGNALS OUTPUT V_BVCC D8(SHDN) D3 D2 OUTPUT V_AVCC D8(SHDN) D6 D7 OUTPUT V_BVCC 1 0 0 0 V 1 0 0 0 V 1 0 1 3.3 V 1 0 1 3.3 V 1 1 0 5 V 1 1 0 5 V 1 1 1 0 V 1 1 1 0 V 0 X X Hi-Z 0 X X Hi-Z 3.5.6 Internal Ring Oscillator The internal ring oscillator provides an internal clock source for the PCI6x21/PCI6x11 controller so that neither the PCI clock nor an external clock is required in order for the PCI6x21/PCI6x11 controller to power down a socket or interrogate a PC Card. This internal oscillator, operating nominally at 16 kHz, is always enabled. 3.5.7 Integrated Pullup Resistors for PC Card Interface The PC Card Standard requires pullup resistors on various terminals to support both CardBus and 16-bit PC Card configurations. The PCI6x21/PCI6x11 controller has integrated all of these pullup resistors and requires no additional external components. The I/O buffer on the BVD1(STSCHG)/CSTSCHG terminal has the capability to switch to an internal pullup resistor when a 16-bit PC Card is inserted, or switch to an internal pulldown resistor when a CardBus card is inserted. This prevents inadvertent CSTSCHG events. The pullup resistor requirements for the various UltraMedia interfaces are either included in the UltraMedia cards (or the UltraMedia adapter) or are part of the existing PCMCIA architecture. The PCI6x21/PCI6x11 controller does not require any additional components for UltraMedia support. 3.5.8 SPKROUT and CAUDPWM Usage The SPKROUT terminal carries the digital audio signal from the PC Card to the system. When a 16-bit PC Card is configured for I/O mode, the BVD2 terminal becomes the SPKR input terminal from the card. This terminal, in CardBus applications, is referred to as CAUDIO. SPKR passes a TTL-level binary audio signal to the PCI6x21/PCI6x11 controller. The CardBus CAUDIO signal also can pass a single-amplitude binary waveform as well as a PWM signal. The binary audio signal from each PC Card sockets is enabled by bit 1 (SPKROUTEN) of the card control register (PCI offset 91h, see Section 4.38). Older controllers support CAUDIO in binary or PWM mode, but use the same output terminal (SPKROUT). Some audio chips may not support both modes on one terminal and may have a separate terminal for binary and PWM. The PCI6x21/PCI6x11 implementation includes a signal for PWM, CAUDPWM, which can be routed to an MFUNC terminal. Bit 2 (AUD2MUX), located in the card control register, is programmed to route a CardBus CAUDIO PWM terminal to CAUDPWM. See Section 4.36, Multifunction Routing Register, for details on configuring the MFUNC terminals. Figure 3−4 illustrates the SPKROUT connection. |
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