LP8733 datasheet(21/82 Pages) TI1

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LP8733

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SNVSBK2 – SEPTEMBER 2019

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Feature Description (continued)

7.3.1.5 Buck Converter Load Current Measurement

The buck load current can be monitored through I2C registers. The monitored buck converter is selected with the

LOAD_CURRENT_BUCK_SELECT bit in the SEL_I_LOAD register. A write to this selection register starts a

current measurement sequence. The regulator is automatically forced to the PWM mode for the measurement

period. The measurement sequence is 50 µs long, maximum.

The LP8733xx device can be configured to give out an interrupt (the I_MEAS_INT bit in the INT_TOP_1 register)

after the load current measurement sequence is finished. The load current measurement interrupt can be

masked with the I_MEAS_MASK bit (TOP_MASK_1 register). The measurement result can be read from the

registers I_LOAD_1 and I_LOAD_2. The register I_LOAD_1 bits BUCK_LOAD_CURRENT[7:0] gives out the

LSB bits, and the register I_LOAD_2 bit BUCK_LOAD_CURRENT[8] gives out the MSB bit. The measurement

result BUCK_LOAD_CURRENT[8:0] LSB is 20 mA, and the maximum code value of the measurement

corresponds to 10.22 A. In dual-phase configuration, the measured current is the total value of the master and

slave phases.

7.3.1.6 Spread-Spectrum Mode

Systems with periodic switching signals may generate a large amount of switching noise in a set of narrowband

frequencies (the switching frequency and its harmonics). The usual solution to reduce noise coupling is to add

EMI-filters and shields to the boards. The LP8733xx has a register-selectable spread-spectrum mode which

minimizes the need for output filters, ferrite beads, or chokes. In spread spectrum mode, the switching frequency

varies around the center frequency, reducing the EMI emissions radiated by the converter and associated

passive components and PCB traces (see Figure 11). Spread-spectrum mode is only available when an internal

RC oscillator is used (EN_PLL bit is 0 in PLL_CTRL register), it is enabled with the EN_SPREAD_SPEC bit in

the CONFIG register, and it affects both buck cores.

Where a fixed frequency converter exhibits large amounts of spectral energy at the switching frequency, the spread

spectrum architecture of the LP8733xx spreads that energy over a large bandwidth.

Figure 11. Spread-Spectrum Modulation

7.3.2 Sync Clock Functionality

The LP8733xx device contains a CLKIN input to synchronize the switching clock of the buck regulators with the

external clock. The block diagram of the clocking and PLL module is shown in Figure 12. Depending on the

EN_PLL bit in the PLL_CTRL register and the external clock availability, the external clock is selected and

interrupt is generated as shown in Table 2. The interrupt can be masked with the SYNC_CLK_MASK bit in the

TOP_MASK_1 register. The nominal frequency of the external input clock is set by the EXT_CLK_FREQ[4:0] bits

in the PLL_CTRL register, and it can be from 1 MHz to 24 MHz with 1-MHz steps. The external clock must be

inside accuracy limits (–30%/+10%) of the selected frequency for valid clock detection.

LP8733 датащи(PDF) 21 Page - Texas Instruments