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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ADP1071-2ARWZ-R7 датащи(PDF) 4 Page - Analog Devices |
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ADP1071-2ARWZ-R7 датащи(HTML) 4 Page - Analog Devices |
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4 / 27 page  ADP1071-1/ADP1071-2 Data Sheet Rev. B | Page 4 of 27 Parameter Symbol Test Conditions/Comments Min Typ Max Unit SUPPLY (SECONDARY) Supply Voltage VDD2 4.7 µF capacitor from VDD2 to AGND2, 1 µF capacitor from VREG2 to AGND2 4.5 12 36 V Quiescent Supply Current IDD2 SR unloaded At 100 kHz 5.3 mA At 300 kHz 5.5 mA At 600 kHz 5.6 mA IDD2 SR loaded with 2.2 nF At 100 kHz 6.4 mA At 300 kHz 8.7 mA At 600 kHz 12.1 mA VDD2 UVLO Threshold VDD2 rising 3.55 V VDD2 falling 3 V UVLO Hysteresis 145 mV Secondary UVLO Hiccup Time 200 ms OSCILLATOR Switching Frequency (fS) RT resistance (RRT) = 480 kΩ (±1%) 50 − 10% 50 50 + 10% kHz RRT = 240 kΩ (±1%) 100 − 10% 100 100 + 10% kHz RRT = 120 kΩ (±1%) 200 − 10% 200 200 + 10% kHz RRT = 80 kΩ (±1%) 300 − 10% 300 300 + 10% kHz RRT = 60 kΩ (±1%) 400 − 10% 400 400 + 10% kHz RRT = 40 kΩ (±1%) 600 − 10% 600 600 + 10% kHz VREG1 PIN VREG1 Voltage Clamp VREG1 current (IVREG1) = 3 mA, VEN < 1.2 V 13.5 14.3 15.2 V VREG1 Clamp Series Resistance VREG1 forced current of 5 mA and 10 mA 16 Ω GATE DRIVERS (PRIMARY) GATE High Voltage IVREG1 = 20 mA, VIN > 9 V (ADP1071-2 only) 7.8 8 8.2 V Gate Short-Circuit Peak Current1 8 V on VREG1 1.0 A GATE Rise Time GATE loaded with 2.2 nF, 10% to 90% 17 ns GATE Fall Time GATE loaded with 2.2 nF, 90% to 10% 15 ns GATE Source Resistance RON_SOURCE Source = 100 mA 4 Ω GATE Sink Resistance RON_SINK Sink = 100 mA 2 Ω GATE Maximum Duty Cycle 84 % GATE Minimum On Time At 300 kHz, includes blanking time 175 ns SR DRIVER (SECONDARY) SR High Voltage IVREG2 = 15 mA, VDD2 > 5.5 V 4.9 5 5.1 V SR Short Circuit Peak Current1 5 V on VREG2 1.0 A SR Rise Time SR loaded with 2.2 nF, 10% to 90% 13 ns SR Fall Time SR loaded with 2.2 nF, 90% to 10% 10 ns SR Minimum On Time At 300 kHz 462 ns SR Source Resistance RON_SR_SOURCE Source = 100 mA 3 Ω SR Sink Resistance RON_SR_SINK Sink = 100 mA 1.5 Ω DEAD TIME SETTING (GATE TO SR) Dead time between SR falling and GATE rising 30 ns Dead time between GATE falling and SR rising 52 ns |
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