ADA4945-1ACPZ-R2 datasheet(15/44 Pages) AD

15 / 44 page

Data Sheet

ADA4945-1

Rev. 0 | Page 15 of 44

ABSOLUTE MAXIMUM RATINGS

Table 10.

Parameter

Rating

Supply Voltage

11 V

VOCM

±VS

Differential Input Voltage

±1 V

Operating Temperature Range

−40°C to +125°C

Storage Temperature Range

−65°C to +150°C

Lead Temperature (Soldering, 10 sec)

300°C

Junction Temperature

150°C

Electrostatic Discharge (ESD)

Field Induced Charged Device Model

(FICDM)

1250 V

Human Body Model (HBM)

4000 V

Stresses at or above those listed under Absolute Maximum

Ratings may cause permanent damage to the product. This is a

stress rating only; functional operation of the product at these

or any other conditions above those indicated in the operational

section of this specification is not implied. Operation beyond

the maximum operating conditions for extended periods may

affect product reliability.

THERMAL RESISTANCE

Thermal performance is directly linked to printed circuit board

(PCB) design and operating environment. Careful attention to

PCB thermal design is required.

θJA is the natural convection, junction to ambient, thermal

resistance measured in a one cubic foot sealed enclosure. θJC is

the junction to case thermal resistance.

Table 11.

Package Type

θJA

θJC

Unit

CP-16-22

°C/W

MAXIMUM POWER DISSIPATION

The maximum safe power dissipation in the ADA4945-1

package is limited by the associated rise in junction temperature

(TJ) on the die. At approximately 150°C, which is the glass

transition temperature, the properties of the plastic change. Even

temporarily exceeding this temperature limit can change the

stresses that the package exerts on the die, permanently shifting

the parametric performance of ADA4945-1. Exceeding a junction

temperature of 150°C for an extended period can result in changes

in the silicon devices, potentially causing failure.

The power dissipated in the package (PD) is the sum of the

quiescent power dissipation and the power dissipated in the

package due to the load drive for all outputs. The quiescent

power dissipation is the voltage between the supply pins (±VS)

times the quiescent current (IS). The load current consists of the

differential and common-mode currents flowing to the load, as

well as currents flowing through the external feedback networks

and internal common-mode feedback loop. The internal resistor

tap used in the common-mode feedback loop places a negligible

differential load on the output. Consider RMS voltages and

currents when dealing with ac signals.

Airflow reduces θJA. In addition, more metal directly in contact

with the package leads from metal traces through holes, ground,

and power planes reduces the θJA.

Figure 2 shows the maximum safe power dissipation in the

package vs. the ambient temperature for the 16-lead LFCSP

(θJA = 70°C/W) package on a JEDEC standard 4-layer board. θJA

values are approximations.

3.0

–40

–20

120

100

AMBIENT TEMPERATURE (°C)

0.5

1.0

1.5

2.0

2.5

Figure 2. Maximum Safe Power Dissipation vs. Ambient Temperature

ESD CAUTION

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