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GD9FS1G8F2ALG датащи(PDF) 45 Page - GigaDevice Semiconductor (Beijing) Inc.

номер детали GD9FS1G8F2ALG
подробное описание детали  Single level cell technology
PDF  55 Pages
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производитель  GIGADEVICE [GigaDevice Semiconductor (Beijing) Inc.]
домашняя страница  http://www.gigadevice.com/
Logo GIGADEVICE - GigaDevice Semiconductor (Beijing) Inc.

GD9FS1G8F2ALG датащи(HTML) 45 Page - GigaDevice Semiconductor (Beijing) Inc.

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12.3 AC Timing Characteristics
Parameter
Symbol
3.3V
1.8V
Min
Max
Min
Max
CE# setup time
tCS
15
-
15
-
ns
CE# hold time
tCH
5
-
5
-
ns
CLE setup time
tCLS
12
-
12
-
ns
CLE Hold time
tCLH
5
-
5
-
ns
ALE setup time
tALS
12
-
12
-
ns
ALE hold time
tALH
5
-
5
-
ns
Data setup time
tDS
12
-
12
-
ns
Data hold time
tDH
5
-
5
-
ns
Write cycle time
tWC
25
-
45
-
ns
WE# pulse width
tWP
12
-
22
-
ns
WE# high hold time
tWH
10
-
15
-
ns
Address to data loading time
tADL
70
-
70
-
ns
WE# high to busy
tWB
-
100
-
100
ns
Ready to WE# low
tRW
20
-
20
-
ns
Ready to RE# low
tRR
20
-
20
-
ns
CLE to RE# delay
tCLR
10
-
10
-
ns
ALE to RE# delay
tAR
10
-
10
-
ns
Read cycle time
tRC
25
-
45
-
ns
RE# pulse width
tRP
12
-
22
-
ns
RE# high hold time
tREH
10
-
15
-
ns
RE# access time
tREA
-
20
-
30
ns
CE# access time
tCEA
-
25
-
45
ns
RE# high to output high Z
tRHZ
-
100
-
100
ns
CE# high to output high Z
tCHZ
-
50
-
50
ns
CE# high to ALE or CLE Don’t care
tCSD
10
-
10
-
ns
CE# high to output hold
tCOH
15
-
15
-
ns
RE# high to output hold
tRHOH
15
-
15
-
ns
RE# low to output hold
tRLOH
3
-
3
-
ns
Output Hi-Z to RE# Low
tIR
0
-
0
-
ns
CE# low to RE# low
tCR
10
-
10
-
ns
RE# high to WE# low
tRHW
100
-
100
-
ns
WE# high to RE# low
tWHR
60
-
60
-
ns
Write protect time
tWW
100
-
100
-
ns



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