GS3470 datasheet(10/169 Pages) SEMTECH

10 / 169 page

GS3470

Final Data Sheet

Rev.8

PDS-060500

September 2017

10 of 169

Semtech

www.semtech.com

SCLK

Digital Input

Serial Data Clock input. Burst-mode clock input for the Gennum

Serial Peripheral Interface (GSPI) host control/status port. When GSPI

is not used, SCLK should be tied HIGH or LOW to minimize noise.

H1, H2

—

No connect. Pins are not connected internally.

JTAG_EN/DIS

Digital Input,

Internal

Pull-down

JTAG interface reset. Digital active-high to enable JTAG

communications.

When HIGH, JTAG operational mode is enabled.

When LOW, JTAG operational mode is disabled.

WCLK

Output

48kHz word clock for audio. When not used, leave unconnected.

RESET

Digital Input,

Internal Pull-up

Device reset signal.

When LOW, the device will be set to default conditions.

BIT20/BIT10

Digital Input,

Internal Pull-up

Control signal input.

Used to select the output bus width.

HIGH = 20-bit, LOW = 10-bit.

Please refer to the Input Logic parameters in Table 2-3: DC Electrical

Characteristics for logic level threshold and compatibility.

Digital Input

Chip Select input for the Gennum Serial Peripheral Interface (GSPI)

host control/status port. Active-low input. When GSPI is not used,

connect CS to IO_VDD.

J1, J2

DDO_VDD

Power

Power pin for the serial digital output 50Ω buffer. Connect to 1.2V or

1.8V DC analog.

PWR_DWN

Digital Input,

Internal

Pull-down

When HIGH, places the device in a power-down state.

J4,

K4,

J6,

AOUT_1_2,

AOUT_3_4,

AOUT_5_6,

AOUT_7_8

Output

Serial Audio Outputs. When not in use, leave unconnected.

ACLK

Output

64fs sample clock for audio. When not in use, leave unconnected.

K1, K2

DDO, DDO

Digital Output

Differential serial digital outputs. It is possible to DC-couple to

downstream Semtech devices supporting 2.5V inputs. When not in

use, leave unconnected.

AUDIO_EN/DIS

Digital Input,

Internal Pull-up

Control signal input.

When HIGH, enables audio extraction. When LOW, disables audio

extraction.

Please refer to the Input Logic parameters in Table 2-3: DC Electrical

Characteristics for logic level threshold and compatibility.

AMCLK

Output

Oversampled master clock for audio (128fs, 256fs, 512fs selectable).

When not in use, leave unconnected.

Table 1-1: Pin Descriptions (Continued)

Pin Number

Name

Type

Description

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