GS3470 datasheet(49/169 Pages) SEMTECH

49 / 169 page

GS3470

Final Data Sheet

Rev.8

PDS-060500

September 2017

49 of 169

Semtech

www.semtech.com

Figure 4-30: H:V:DE Output Timing 2048 x 1080p @ 48/24

4.13 Automatic Video Standards Detection

The GS3470 is able to identify the received video standard. It will also indicate whether

the 3G input signal is Level A or Level B. The VID_STD_DS1 and VID_STD_DS2 registers

can be used to access this information. Table 4-10 describes the 5-bit codes for the

recognized video standards.

Four additional registers are provided to allow the host to read the video standard

information from the device such as total words per line, active words per line, total lines

per field/frame, and active lines per field/frame. This information can be accessed

through the RASTER_STRUC_[4:1]_DS[2:1] registers.

The RASTER_STRUC_4_DS[2:1] registers also contain three status bits:

STD_LOCK_DS[2:1], INT_PROG_DS[2:1], and M_DS[2:1]. The STD_LOCK_DS[2:1] bit

is set HIGH whenever the timing signal generator is fully synchronized to the incoming

standard, and detects it as one of the supported formats. The INT_PROG_DS[2:1] bit is

set HIGH if the detected video standard is interlaced and LOW if the detected video

standard is progressive. M is set HIGH if the clock frequency includes the “1000/1001”

factor denoting a 23.98Hz, 29.97Hz, or 59.94Hz frame rate.

1123 1124 1125

21 22

192

510

Data

Enable

H SYNC

V SYNC

Field 1:

22 Vertical Blank Lines

540

Active

Vertical Line

per field

2750

2048

Active Video

702

510

148

Data

Enable

H SYNC

568

560

561

562

563

564

565

566

567

584

585

108

510

Data

Enable

H SYNC

V SYNC

Field 2:

23 Vertical Blank Lines

540

Active

Vertical Line

per field

569

570

571

1375

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