IP175G datasheet(48/69 Pages) ETC2

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IP175G/GI/GH/GHI

Data Sheet

48 / 69

November 27, 2012

IP175Gx-DS-R01.3

6.12 Backpressure setting registers

PHY

MII

R/W

Description

Default

13[7:0]

R/W

PORT_BACKPRESSURE_EN

Backpressure ability setting at half-duplex mode for each port. To

ensure this function works correctly, BK_EN (backpressure enable, reg

20.1[8]) should set to logic zero first.

1: enable backpressure ability

0: disable

bit[7]:

port 4 enable backpressure ability

Note 1

bit[6]:

port 3 enable backpressure ability

bit[4]:

port 2 enable backpressure ability

bit[3]:

port 1 enable backpressure ability

bit[2]:

port 0 enable backpressure ability

8’h00

6.13 TCP/UDP port priority registers

PHY

MII

R/W

Description

Default

14[15:8]

R/W

LPP_AGING_EN

TCP/UDP logical port priority aging enable

0: disable TCP/UDP logical port priority aging function

1: enable TCP/UDP logical port priority aging function

When this function active, once receive a IP frame with TCP/UDP

protocol and the logical port number is the pre-defined port number,

the ingress port will treat as a port based high priority port for 300

seconds. After the internal timer expired, the ingress port will change

back to previous behavior.

bit[15]:

port 4 logical port priority aging enable

Note 1

bit[14]:

port 3 logical port priority aging enable

bit[12]:

port 2 logical port priority aging enable

bit[11]:

port 1 logical port priority aging enable

bit[10]:

port 0 logical port priority aging enable

8’h00

14[7:6]

Reserved

14[5:4]

R/W

USERDEF_RANGE_EN

User defined logic port range enable.

bit[1]:

user define range 1 register enable

bit[0]:

user define range 0 register enable

2’b11

14[3:0]

R/W

PREDEF_PORT_EN

Pre-defined logic port number enable.

bit[3]:

logic port set 3 enable, port 6000

bit[2]:

logic port set 2 enable, port 3389

bit[1]:

logic port set 1 enable, port 443

bit[0]:

logic port set 0 enable, port 22

4’hF

R/W

USERDEF_RANGE0_HIGH

User defined logic port range 0 high limit

16’d23

R/W

USERDEF_RANGE0_LOW

User defined logic port range 0 low limit

16’d23

R/W

USERDEF_RANGE1_HIGH

User defined logic port range 1 high limit

16’d

5800

R/W

USERDEF_RANGE1_LOW

User defined logic port range 1 low limit

16’d

5800

Note 1 : Port mapping refer Figure 2 Application Diagram

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