IP175G datasheet(37/69 Pages) ETC2

37 / 69 page

IP175G/GI/GH/GHI

Data Sheet

37 / 69

November 27, 2012

IP175Gx-DS-R01.3

6.2

MMD Control Register

Table 8 MMD Control Register table

PHY

MII

R/W

Description

Default

MMD Access Control Register

13[15:14]

R/W

Function

00 = address

01 = data, no post increment

10 = data, post increment on reads and writes

11 = data, post increment on writes only

13[13:5]

R/W

Reserved

Write as 0, ignore on read

13[4:0]

R/W

DEVAD

Device Address

PHY

MII

R/W

Description

Default

MMD Access Address Data Register

14[15:0]

R/W

Address Data

If 13.15:14 = 00, MMD DEVAD’s address register.

Otherwise, MMD DEVAD’s data register as indicated by the

contents of its address register

Example 1, Read 2.3.20 (Read Data from MMD register 3.20 of PHY address 2):

Write 2.13 = 0x0003 //MMD DEVAD 3

Write 2.14 = 0x0014 //MMD Address 20

Write 2.13 = 0x4003 //MMD Data command for MMD DEVAD 3

//Read MMD Data from 2.3.20

Example 2, Write 3.7.60 = 0x3210 (Write 0x3210 Data to MMD register 7.60 of PHY address 3):

Write 3.13 = 0x0007 //MMD DEVAD 7

Write 3.14 = 0x003C //MMD Address 60

Write 3.13 = 0x4007 //MMD Data command for MMD DEVAD 7

Write 3.14 = 0x3210 //Write MMD Data 0x3210 to 3.7.60

6.3

MMD Data Register

Table 9 MMD Data Register table

PHY

MII

R/W

Description

Default

PCS control 1 Register

3.0[15:11]

Reserved

Ignore when read

3.0.10

R/W

Clock stop enable

1 = IP175G/GH may stop xMII Rx clock during LPI

0 = Clock not stoppable

3.0[9:0]

Reserved

Ignore when read

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