ZXLD1371Q

ZXLD1371Q

Document number: DS37116 Rev. 1 - 2

3 of 42

www.diodes.com

September 2015

© Diodes Incorporated

ZXLD1371Q

Pin Name

Pin

Type

(Note 5)

Function

SGND

6

P

Signal Ground (Connect to 0V)

PGND

7

P

Power Ground - Connect to 0V and pin 8 to maximize copper area

N/C

8

-

Not Connected Internally

– recommend connection to pin 7, (PGND), to maximize PCB copper for

thermal dissipation

N/C

9

Not Connected Internally

– recommend connection pin 10 (GATE) to permit wide copper trace to

gate of MOSFET

GATE

10

O

Gate Drive Output to External NMOS Transistor

– Connect to Pin 9

11

P

Auxiliary Positive Supply to Internal Switch Gate Driver

a bootstrap circuit is recommended to ensure adequate gate drive voltage

(see Applications section)

power supply (see Applications section). Decouple to ground with capacitor close to device (see

Applications section)

12

P

Input Supply to Device 5V to 60V

Decouple to ground with capacitor close to device (refer to Applications section)

ISM

13

I

Current Monitor Input

in Boost and Buck-Boost modes, varying with duty cycle.

FLAG

14

O

Flag Open Drain Output

Pin is high impedance during normal operation

Pin switches low to indicate a fault, or warning condition

PWM

15

I

Digital PWM Output Current Control

Pin driven either by open Drain or push-pull 3.3V or 5V logic levels.

Drive with frequency higher than 100Hz to gate output ‘on’ and ‘off’ during dimming control.

The device enters standby mode when PWM pin is driven with logic low level for more than 15ms

nominal (Refer to application section for more details)

GI

16

I

Gain Setting Input

Used to set the device in Buck mode or Boost, Buck-boost modes and to control the sense voltage

in Boost and Buck-boost modes

Connect to ADJ pin for Buck mode operation

For Boost and Buck-boost modes, connect to resistive divider from ADJ to SGND. The GI divider

is required to compensate for duty cycle gating in the internal feedback loop (see Application

section). The GI pin has an internal clamp that limits the internal node to less than 3V. This

provides some failsafe should it become overdriven.

EP

PAD

P

Exposed Paddle

Connect to 0V plane for electrical and thermal management

Note:

5.

Type refers to whether or not pin is an Input, Output, Input/Output or power supply pin.

Symbol

Parameter

Rating

Unit

Input Supply Voltage

-0.3 to 65

V

Auxiliary Supply Voltage

-0.3 to 65

V

Current Monitor Input Relative to GND

-0.3 to 65

V

-0.3 to 5

V

Gate Driver Output Voltage

-0.3 to 20

V

Gate Driver Continuous Output Current

18

mA

Flag Output Voltage

-0.3 to 40

V

Other Input Pins

-0.3 to 5.5

V

Maximum Junction Temperature

+150

°C

Storage Temperature

-55 to +150

°C

Note:

6. For correct operation, SGND and PGND should always be connected together.

Caution:

Stresses greater than the 'Absolute Maximum Ratings' specified above, may cause permanent damage to the device. These are stress ratings only;

functional operation of the device at conditions between maximum recommended operating conditions and absolute maximum ratings is not implied.

Device reliability may be affected by exposure to absolute maximum rating conditions for extended periods of time.