ZXLD1371Q

ZXLD1371Q

Document number: DS37116 Rev. 1 - 2

20 of 42

www.diodes.com

September 2015

© Diodes Incorporated

ZXLD1371Q

Application Information

The ZXLD1371Q is a high accuracy hysteretic inductive buck/boost/buck-boost controller designed to be used with an external NMOS

switch for current-driving single or multiple series-connected LEDs. The device can be configured to operate in buck, boost, or buck-boost

modes by suitable configuration of the external components as shown in the schematics shown in the device operation description.

DEVICE DESCRIPTION

a) Buck Mode

– the most simple buck circuit is shown in Figure 1

Control of the LED current buck mode is achieved by sensing the

coil current in the sense resistor Rs, connected between the two

inputs of a current monitor within the control loop block. An output

from the control loop drives the input of a comparator which drives

the gate of the external NMOS switch transistor Q1 via the internal

Gate Driver. When the switch is on, the drain voltage of Q1 is near

zero.

Current flows from VIN, via Rs, LED, coil and switch to

ground. This current ramps up until an upper threshold value is

reached (see Figure 2). At this point GATE goes low, the switch is

turned off and the drain voltage increases to VIN plus the forward

coil and D1 back to VIN. When the coil current has ramped down

to a lower threshold value, GATE goes high, the switch is turned

on again and the cycle of events repeats, resulting in continuous

oscillation. The feedback loop adjusts the NMOS switch duty cycle

to stabilize the LED current in response to changes in external

conditions, including input voltage and load voltage.

Figure 1. Buck configuration

The average current in the sense resistor, LED and coil is equal to

the average of the maximum and minimum threshold currents. The

ripple current (hysteresis) is equal to the difference between the

thresholds. The control loop maintains the average LED current at

the set level by adjusting the switch duty cycle continuously to force

the average sense resistor current to the value demanded by the

voltage on the ADJ pin. This minimizes variation in output current

with changes in operating conditions.

The control loop also regulates the switching frequency by varying

the level of hysteresis. The hysteresis has a defined minimum (typ

5%) and a maximum (typ 30%). The frequency may deviate from

nominal in some conditions. This depends upon the desired LED

current, the coil inductance and the voltages at the input and the

load. Loop compensation is achieved by a single external capacitor

C2, connected between SHP and SGND.

The control loop sets the duty cycle so that the sense voltage is

Therefore,

0.21

S

(Buck mode)

Equation

1

If the ADJ pin is connected to the REF pin, this simplifies to

0.21

S

(Buck mode).

Figure 2. Operating waveforms (Buck mode)

GATE

voltage

+11V to

15V typ.

0V

Q1

Drain

voltage

VIN + VF

0V

Coil &

LED

current

0A

Sense

voltage

Mean = 218mV

VIN

VAUX

ISM

GATE

FLAG

STATUS

SHP

REF

TADJ

ADJ

PWM

GI

SGND PGND

ZXLD1371

C2

330pF

Q1

L1

Rs

VIN

0.15

Ω

LED1...n

C1