IX6610 datasheet(19/23 Pages) IXYS

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IX6610

R00A

PRELIMINARY

FLTRST clears the fault flags, and normal operation

resumes.

If the FAULT1 and FAULT2 flags are set by secondary

side under voltage or over voltage faults, then the input

signals are not disabled, and the fault flags are reset

only by a logic high signal at the FLTRST input.

A secondary side IGBT power stage over current fault

is latched, FAULT2 output is asserted logic high, and

the input signals are not disabled. The flag is reset

only by applying a logic high signal to the FLTRST

input.

The MCU can continuously monitor the FAULT1 and

FAULT2 flags. If the fault flags are set, then the MCU

will determine the fault condition by detecting the fault

signals and manipulating the FLTRST as shown in

Figure 5 through Figure 10 and the MCU FAULT

HANDLING FLOW diagram.

2.1.9

Push-Pull Power Converter Control

The IX6610 contains all necessary components to

implement a push-pull power converter. Push-pull

topology provides a simple solution for making

isolated power supplies. Push-pull converter topology

allows multiple isolated outputs, stepup/stepdown

and/or inverted output with low output ripple.

The circuit drives two internal high current switches

connected to an external center tapped transformer

providing dual isolated secondary side positive and

negative voltages for the IGBT drivers in addition to an

isolated bootstrapped 5V supply to the IX6610. The

transformer’s secondary to primary winding ratio

determines the isolated output voltages.

The power converter has a startup mode and a run

mode. In the startup mode, the converter operates

from the internal oscillator or MCU Clock. In the

startup mode, to reduce the dynamic current

consumption/power dissipation, only a portion of the

power switches are enabled. In the run mode, the

power converter operates from the internal oscillator

or MCU clock with variable duty cycle. In the run mode

the entire power switch is enabled. The power

converter switches from startup mode to run mode

when the IX6610 has detected a reflected voltage

threshold of 1.9375*VIN on the TRDCP pin during the

driver disabled period. The run mode is held off until

the reflected voltage threshold detect has been valid

for 128 clocks or ~1.28ms. Transmit operation is also

disabled during startup mode to minimize current draw

in the secondary. Once run mode begins, the IX6610

will no longer monitor the TRDCP voltage, and will

continue this mode of operation until a reset occurs

returning the power converter to startup mode.

2.1.10 Watchdog Timer

The internal oscillator or an external MCU provides a

clock signal to the push-pull power converter.

Oscillator failure or MCU clock failure can cause

excessive DC current in the primary winding of the

power converter. To prevent excessive power

dissipation and potential failure of the IC due to clock

failure, a watchdog timer is included in IX6610.

Whenever the push-pull converter clock is not

recognized as a valid clock, the internal clock will take

over clocking of the power converter until a valid

external clock is detected.

2.1.11 Thermal Shutdown (THSD)

The IX6610 contains a Thermal Shutdown circuit to

protect the device against damage due to excessive

die temperature. When the junction temperature

exceeds 150°C, the power converter is disabled. The

device resumes normal operation when the junction

temperature falls below 130°C. Thermal shutdown

status is transmitted via the FAULT1 and FAULT2 pins

to the MCU.

2.1.12 5V Startup Regulator (VCC)

The IX6610 VCC startup regulator provides power to

the LDO when the auxiliary winding voltage is less

than 4.1V. To reduce power loss and to improve

efficiency, the startup regulator is connected to the

auxiliary winding pin VAUX. The VAUX pin is sourced

from the auxiliary winding when the voltage is greater

than 4.1V. A large ceramic bypass capacitor is

required at the VAUX pin. Reference voltage to the

regulator is provided by the internal chopper-stabilized

bandgap voltage reference circuit.

FAULT1

FAULT2

Operational Status

Normal operation

Primary or secondary side UVLO

condition

Primary side OVLO or secondary side

power stage fault condition

Primary side OVERTEMP or secondary

side OVLO condition

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