HTADC12 datasheet(11/12 Pages) HONEYWELL

11 / 12 page

Switching Time

Delay time to achieve settled data when switching between

the two data bytes will be dependent on the amount of load

capacitance present on the output drivers. A general guideline

for estimating the delay is given by the formula

TD = 4.0 ns + 0.25 ns/pF × CL

where TD is the delay time in ns, and CL is the capacitive

load on each output driver in pF.

TD represents the total time required for an output driver’s

voltage level to fall to 10% of its previous logic high value,

or to rise to 90% of its logic high value from a logic low,

after A0 is asserted.

Grounding and Decoupling

Analog and Digital Grounding

Proper grounding is essential in any high speed, high-resolution

system. Multilayer printed circuit boards (PCBs) are

recommended to provide optimal grounding and power

schemes. The use of ground and power planes offers distinct

advantages:

1. The minimization of the loop area encompassed by

a signal and its return path.

2. The minimization of the impedance associated with

ground and power paths.

3. The inherent distributed capacitor formed by the power

plane, PCB insulation and ground plane.

These characteristics result in both a reduction of

electromagnetic interference (EMI) and an overall improvement

in performance.

Cload (pF)

Approximate TD (ns)

6.5

32.5

100

65.0

It is important to design a layout that prevents noise from

coupling onto the input signal. Digital signals should not be run

in parallel with input signal traces and should be routed away

from the input circuitry. While the HTADC12 features separate

analog and digital power and ground pins, it should be treated

as an analog component. The VSSA and VSS pins must be

joined together directly under the HTADC12. A solid ground

plane under the A/D is acceptable if the power and ground

return currents are carefully managed. Alternatively, the ground

plane under the A/D may contain serrations to steer currents

in predictable directions where cross coupling between analog

and digital would otherwise be unavoidable.

Analog and Digital Driver Supply Decoupling

The HTADC12 features separate analog and digital supply and

ground pins, helping to minimize digital corruption of sensitive

analog signals.

In general, VDDA, the analog supply, should be decoupled

to VSSA, the analog common, as close to the chip as

physically possible.

Reliability

Honeywell understands the stringent reliability requirements that

high temperature systems require and has extensive experience

in reliability testing on programs of this nature. Reliability

attributes of the SOI process were characterized by testing

specially designed structures to evaluate failure mechanisms

including hot carriers, electro-migration, and time-dependent

dielectric breakdown. The results are fed back to improve

the process to ensure the highest reliability products.

Switching Time

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