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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AD9545BCPZ датащи(PDF) 14 Page - Analog Devices |
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AD9545BCPZ датащи(HTML) 14 Page - Analog Devices |
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14 / 157 page  AD9545 Data Sheet Rev. A | Page 14 of 157 Parameter Min Typ Max Unit Test Conditions/Comments SINGLE-ENDED MODE Output Frequency 1 500 × 106 Hz Frequency range determined by driver functionality; actual frequency synthesis may be limited by the APLL VCO frequency range Output Current = 12 mA Voltage Swing (Peak-to-Peak) HCSL Driver Mode 509 584 634 mV Each output terminated per Figure 37 with RL = 50 Ω CML Driver Mode 456 565 644 mV Each output terminated per Figure 37 with RL = 50 Ω connected to VDD (nominal 1.8 V) instead of GND Voltage Swing Midpoint HCSL Driver Mode 255 292 317 mV Each output terminated per Figure 37 with RL = 50 Ω CML Driver Mode VDD − 325 VDD − 291 VDD − 266 mV Each output terminated per Figure 37 with RL = 50 Ω connected to VDD (nominal 1.8 V) instead of GND Output Current = 15 mA Voltage Swing (Peak-to-Peak) HCSL Driver Mode 645 734 796 mV Each output terminated per Figure 37 with RL = 50 Ω CML Driver Mode 589 721 815 mV Each output terminated per Figure 37 with RL = 50 Ω connected to VDD (nominal 1.8 V) instead of GND Voltage Swing Midpoint HCSL Driver Mode 322 367 398 mV Each output terminated per Figure 37 with RL = 50 Ω CML Driver Mode VDD − 411 VDD − 367 VDD − 334 mV Each output terminated per Figure 37 with RL = 50 Ω connected to VDD (nominal 1.8 V) instead of GND TIME DURATION OF DIGITAL FUNCTIONS Table 9. Parameter Min Typ Max Unit Test Conditions/Comments TIME DURATION OF DIGITAL FUNCTIONS EEPROM to Register Download Time 10 ms Using the Typical Configuration specification from Table 3 Power-On Reset (POR) 25 ms Time from power supplies > 80% to release of internal reset Mx Pin to RESETB Rising Edge Setup Time 1 ns Mx refers to Pin M0 through Pin M6 Mx Pin to RESETB Rising Edge Hold Time 2 ns Multiple Mx Pin Timing Skew 39 ns Applies only to multibit Mx pin functions RESETB Falling Edge to Mx Pin High-Z Time 14 ns TIME FROM START OF DPLL ACTIVATION TO ACTIVE PHASE DETECTOR OUTPUT Untagged Operation 10 tPFD tPFD is the nominal phase detector period given by R/fREF, where R is the frequency division factor determined by the R divider, and fREF is the frequency of the active reference Tagged Operation 10 Tag period Tag period = (tag ratio/fTAG), where fTAG is either fREF (for tagged reference mode) or fFEEDBACK (for all other tagged modes); the tag ratio corresponds to the selection of fTAG |
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