AD9545BCPZ datasheet(5/157 Pages) AD

5 / 157 page

Data Sheet

AD9545

Rev. A | Page 5 of 157

REVISION HISTORY

4/2018—Rev. 0 to Rev. A

Changes to Features Section, Applications Section, and General

Description Section...........................................................................1

Changes to Figure 1...........................................................................7

Changes to Table 3 ............................................................................8

Changes to Table 4 ..........................................................................10

Changes to Table 5 ..........................................................................11

Changes to Table 6 ..........................................................................12

Change to Table 7 ............................................................................13

Change to Table 9 ............................................................................14

Change to Table 10..........................................................................15

Changes to Table 12 ........................................................................16

Changes to Table 18 ........................................................................17

Changes to Table 19 ........................................................................18

Changes to Table 20 ........................................................................19

Changes to Table 21 and Table 22 .................................................20

Changes to Table 23 ........................................................................21

Changes to Thermal Resistance Section and Table 25 ...............24

Changes to Table 26 ........................................................................25

Changes to Typical Performance Characteristics Section .........27

Changes to Terminology Section ..................................................31

Moved Theory of Operation Section............................................32

Changes to Theory of Operation Section ....................................32

Moved Input/Output Termination Recommendations Section.....33

Changes to Input/Output Termination Recommendations

Section ..............................................................................................33

Added Figure 39 and Figure 40; Renumbered Sequentially............35

Added System Clock PLL Overview Heading and Figure 42....36

Changes to System Clock Input Frequency Declaration Section,

System Clock Source Section, Crystal Path Section, Direct Path

Section ..............................................................................................36

Added System Clock Calibration Section....................................37

Changes to 2× Frequency Multiplyer Section, Prescale Divider

Section, Feedback Divider Section, and System Clock PLL Lock

Detector Section ..............................................................................37

Deleted System Clock Input Termination Recommendations

Section ..............................................................................................37

Added System Clock Stability Compensation Section...............38

Added Reference Clock Input Recievers Section, Table 27, and

Table 28; Renumbered Sequentially..............................................39

Added Reference Dividers (R-Dividers) Section ........................41

Added Reference Monitor Section and Figure 43.......................42

Added Table 29 and Figure 44 .......................................................43

Added Table 30 ................................................................................44

Added Reference Demodulator Section and Figure 45..............47

Added Figure 46 ..............................................................................48

Added Distribution Clock Output Drivers Section, Table 31,

Table 32, and Table 33.....................................................................50

Added Table 34 ................................................................................52

Added Distribution Dividers (Q Dividers) Section....................53

Added Figure 47 ..............................................................................54

Added Distribution Phase Offset Control Section .....................56

Added Table 35 ................................................................................57

Added Distribution N-Shot/PRBS Output Clocking Section and

Figure 48...........................................................................................59

Added Table 36 and Figure 49.......................................................60

Added Figure 50, Figure 51, and Figure 52..................................61

Added Figure 53 ..............................................................................62

Added Distribution Embedded Output Clock Modulation

Section and Figure 54 .....................................................................63

Added Figure 55 ..............................................................................64

Added Figure 56 and Figure 57 .....................................................65

Added Figure 58, Figure 59, and Figure 60..................................66

Added Figure 61 ..............................................................................67

Added Distribution Output Clock Synchronization Section....68

Added Table 37 ................................................................................69

Added Frequency Translation Loops Section and Figure 62 ....70

Added Table 38 ................................................................................71

Added Table 39 and Figure 63.......................................................72

Added Figure 64 ..............................................................................73

Added Table 40 ................................................................................74

Added Figure 65 ..............................................................................75

Added Source Profiles Section and Figure 66 .............................76

Added Figure 67 ..............................................................................78

Moved Digital PLL (DPLL) Section .............................................79

Changes to Digital PLL (DPLL) Section ......................................79

Added Figure 69 and Figure 70 .....................................................81

Added Table 41 ................................................................................82

Added Figure 71 ..............................................................................83

Added Table 42 and Figure 72.......................................................84

Added Table 43 and Table 44.........................................................87

Added Figure 74 ..............................................................................88

Added Figure 75 and Figure 76 .....................................................89

Added Figure 77 ..............................................................................90

Added Figure 78 ..............................................................................94

Added Table 45 ................................................................................95

Added Cascaded DPLL Configuration Section and Figure 79.......97

Added Figure 80 ..............................................................................98

Added Analog PLL (APLL) Section, Table 46, and Figure 81......100

Added Table 47 and Table 48.......................................................101

Added Figure 82 and Table 49.....................................................102

Added Reference Switching Section ...........................................103

Added Figure 83 ............................................................................104

Added Figure 84 and Table 50.....................................................105

Added Figure 85 ............................................................................107

Added Figure 86 ............................................................................108

Added Time-to-Digital Converter (TDC) Section and

Figure 87.........................................................................................109

Added Timestamps Section and Table 51..................................110

Added User Access to Timestamps Section...............................112

Added Figure 88 and Figure 89 ...................................................113

Added Timing Skew Measurements Using Two TDCs Section,

Figure 90, and Table 52.................................................................115

Added Auxilary TDCs Section and Figure 91...........................117

Added Figure 92 ............................................................................118

Added Auxilary NCOs Section, Figure 93, and Figure 94.......119

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