AD9545BCPZ datasheet(44/157 Pages) AD

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AD9545

Data Sheet

Rev. A | Page 44 of 157

65.5 µs. Use JTOL to define the maximum rms jitter the reference

monitor accepts before indicating an excess jitter condition.

For example, if the expected jitter limit is 75 ns rms, then JTOL =

75 (0x004B hexadecimal).

Programming JTOL = 0 disables the JEXCESS status bit (see Figure 43).

Even though JTOL = 0 disables the status bit, the reference

monitor continues to assess jitter as part of its period estimation

process.

REFx Validation Timer (tVALID)

Each reference input has a dedicated bit field to specify tVALID:

the unsigned 20-bit REFx validation timer bit field (where x

is A, AA, B, or BB) in Register 0x0410 to Register 0x0412,

represents time in units of milliseconds up to a maximum of

approximately 1048 sec (approximately 17.5 min). See the

Reference Validation section for details on the validation timer.

For example, a validation time of 10 min requires:

tVALID

= (10 min) × (60 sec/min) × (1000 ms/sec)

= 600,000 ms (0x927C0 hexadecimal)

Timeout Reference Monitor x (Timeout)

Each reference input has a dedicated timeout control bit to force

the timing out of the reference validation process. Timeout

control is via the Timeout Reference Monitor x bit (where x is

A, AA, B, or BB) in Bits[D3:D0] of Register 0x2002. When the

validation timer is in the process of validating a reference (see

the Reference Validation section), programming timeout = 1

forces expiration of the validation timer, thereby indicating the

valid control bit = 1 (see Figure 43). When timeout = 0

(default), the status of the valid control bit depends on the

normal operation of the validation timer.

Bypass Reference Monitor x (Bypass)

Each reference input has a dedicated bypass control bit to allow

bypassing of the valid/invalid decision in the reference monitor.

Bypass control is via the Bypass Reference Monitor x bit (where

x is A, AA, B, or BB) in Bits[D3:D0] of Register 0x2004. The

bypass function does not actually bypass the reference monitor

itself but only its ability to validate a reference.

Setting bypass = 0 (default) allows the out of tolerance (OOT)

decision from the REFx monitor block to propagate to the

validation timer (see Figure 43), which constitutes normal

reference monitor operation. That is, reference validation is

completely under the control of the reference monitor (except

when the user programs fault = 1 (see Figure 43), which

overrides an in tolerance decision by the REFx monitor block).

When bypass = 1, the fault bit becomes a substitute for the out

of tolerance decision to the validation timer, placing reference

validation under direct user control but still giving the user

access to the OOT decisions of the reference monitor via the

REFx fault, REFx fast, REFx slow, and REFx LOS bits in

Fault REFx (Fault)

Each reference input has a dedicated fault control bit to force

reference validation decisions. Fault control is via the fault REFx

bit (where x is A, AA, B, or BB) in Bits[D3:D0] of Register 0x2003.

When bypass = 0, programming fault = 1 forces a reference to

be invalid regardless of the in or out of tolerance decision of the

reference monitor. However, the user still has access to the OOT

decisions (see Figure 43). The user cannot force a reference to

be valid when bypass = 0.

When bypass = 1, the fault bit allows the user to force a

reference to be valid (fault = 0) or invalid (fault = 1). However,

the user still has access to the OOT decisions of the reference

monitor (see Figure 43).

Table 30 shows a summary of the interaction between the

bypass and fault functions.

Table 30. Reference Monitor Bypass And Fault Summary

Bypass

Fault

Function

The reference monitor has complete

control over REFx validation

Force REFx invalid

Force REFx valid

Force REFx invalid

Regardless of the programmed state of the bypass and fault bits,

the user always has access to the OOT decisions of the reference

monitor (see Figure 43).

In Table 30, the bypass = 0 and fault = 1 conditions constitute

normal reference monitor operation, yet forces the associated

reference to be invalid.

Choosing this condition can be useful when a reference signal

must be traceable to a primary timing source and the user has

external knowledge that the source is no longer traceable. In

this case, the reference may still satisfy the in tolerance

parameters so that the reference monitor sees the reference as

valid. The user has the option of forcing the reference to be

invalid by programming fault = 1 even though the reference

monitor indicates an in tolerance condition.

In Table 30, the bypass = 1 and fault = 0 conditions and the

bypass = 1 and fault = 1 conditions provide the user with total

control over declaring a reference as valid or invalid. This

control can be useful when a reference signal is of the gapped

clock variety. In such a case, the reference monitor cannot reliably

discern an in or out of tolerance condition, which can cause an

otherwise valid reference to be invalid from the point of view of

the reference monitor. The two aforementioned conditions

provide a means to declare a reference as valid (bypass = 1 and

fault = 0) or invalid (bypass = 1 and fault = 1) at the discretion

of the user.

MONITOR TIME BASE

The reference monitor uses the internal system clock as the

time base for measuring the input reference frequency. Because

the reference monitor relies on the system clock as its time base,

it must verify the system clock is locked and stable.

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