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LPC83X датащи(PDF) 67 Page - NXP Semiconductors |
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LPC83X датащи(HTML) 67 Page - NXP Semiconductors |
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67 / 78 page ![]() LPC83x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved. Product data sheet Rev. 1.2 — 4 April 2018 67 of 78 NXP Semiconductors LPC83x 32-bit ARM Cortex-M0+ microcontroller 14.3 Connecting power, clocks, and debug functions Figure 41 shows the basic board connections used to power the LPC83x, connect the external crystal, and provide debug capabilities via the serial wire port. (1) See Section 14.1 “XTAL input” for the values of C1 and C2. (2) Position the decoupling capacitors of 0.1 μF and 0.01 μF as close as possible to the VDD pin. Add one set of decoupling capacitors to each VDD pin. (3) Position the decoupling capacitors of 0.1 μF as close as possible to the VREFN and VDD pins. The 10 μF bypass capacitor filters the power line. Tie VREFP to VDD if the ADC is not used. Tie VREFN to VSS if ADC is not used. (4) Uses the ARM 10-pin interface for SWD. (5) When measuring signals of low frequency, use a low-pass filter to remove noise and to improve ADC performance. Also see Ref. 2. Fig 41. Power, clock, and debug connections SWDIO/PIO0_2 SWCLK/PIO0_3 RESET/PIO0_5 VSS PIO0_12 ADC_0 PIO0_8/XTALIN PIO0_9/XTALOUT VDD (2 to 5 pins) VREFP PIO0_6/ADC_1 VREFN LPC83x 3.3 V 3.3 V DGND DGND DGND DGND 1 3 5 7 9 2 4 6 8 10 Note 4 Note 5 Note 5 (ADC_1) C1 C2 Note 1 DGND DGND Note 2 Note 3 0.01 μF 0.1 μF 3.3 V AGND AGND AGND 10 μF 0.1 μF 0.1 μF ISP select pin n.c. n.c. n.c. SWD connector 3.3 V ~10 kΩ - 100 kΩ ~10 kΩ - 100 kΩ aaa-024109 VSSA AGND |
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