LPC83X datasheet(2/78 Pages) NXP

2 / 78 page

LPC83x

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Product data sheet

Rev. 1.2 — 4 April 2018

2 of 78

NXP Semiconductors

LPC83x

32-bit ARM Cortex-M0+ microcontroller



GPIO interrupt generation capability with boolean pattern-matching feature on eight

GPIO inputs.



Switch matrix for flexible configuration of each I/O pin function.



CRC engine.



DMA with 18 channels and 8 trigger inputs.



Timers:



SCTimer/PWM with up to 4 capture inputs and 4 match output functions for timing

and PWM applications.



Four channel Multi-Rate Timer (MRT) for repetitive interrupt generation at up to

four programmable, fixed rates.



Self-Wake-up Timer (WKT) clocked from either the IRC, a low-power,

low-frequency internal oscillator, or an external clock input in the always-on power

domain.



Windowed Watchdog timer (WWDT).



Analog peripherals:



One 12-bit ADC with up to 12 input channels with multiple internal and external

trigger inputs and with sample rates of up to 1.2 Msamples/s. The ADC supports

two independent conversion sequences.



Serial peripherals:



One USART interface with pin functions assigned through the switch matrix and

one fractional baud rate generator.



Two SPI controllers with pin functions assigned through the switch matrix.



One I2C-bus interface. Supports Fast-mode Plus with 1 Mbit/s data rates on the

open-drain pins and listen mode.



Clock generation:



12 MHz internal RC oscillator trimmed to 1.5 % accuracy that can optionally be

used as a system clock.



Crystal oscillator with an operating range of 1 MHz to 25 MHz.



Programmable watchdog oscillator with a frequency range of 9.4 kHz to 2.3 MHz.



PLL allows CPU operation up to the maximum CPU rate without the need for a

high-frequency crystal. May be run from the system oscillator, the external clock

input, or the internal RC oscillator.



Clock output function with divider that can reflect all internal clock sources.



Power control:



Power consumption in active mode as low as 90 uA/MHz in low-current mode

using the IRC as the clock source.



Integrated PMU (Power Management Unit) to minimize power consumption.



Reduced power modes: Sleep mode, Deep-sleep mode, Power-down mode, and

Deep power-down mode.



Wake-up from Deep-sleep and Power-down modes on activity on USART, SPI, and

I2C peripherals.



Timer-controlled self wake-up from Deep power-down mode.



Power-On Reset (POR).



Brownout detect (BOD).

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