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PIC1F628 датащи(PDF) 46 Page - Microchip Technology |
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PIC1F628 датащи(HTML) 46 Page - Microchip Technology |
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46 / 170 page ![]() PIC16F62X DS40300C-page 44 Preliminary 2003 Microchip Technology Inc. 6.3 Timer0 Prescaler An 8-bit counter is available as a prescaler for the Timer0 module, or as a postscaler for the Watchdog Timer. A prescaler assignment for the Timer0 module means that there is no postscaler for the Watchdog Timer, and vice-versa. The PSA and PS2:PS0 bits (OPTION<3:0>) determine the prescaler assignment and prescale ratio. When assigned to the Timer0 module, all instructions writing to the TMR0 register (e.g., CLRF 1, MOVWF 1, BSF 1, x....etc. ) will clear the pres- caler. When assigned to WDT, a CLRWDT instruction will clear the prescaler along with the Watchdog Timer. The prescaler is not readable or writable. FIGURE 6-1: BLOCK DIAGRAM OF THE TIMER0/WDT T0CKI T0SE Pin F OSC/4 SYNC 2 Cycles TMR0 reg 8-to-1MUX Watchdog Timer PSA 01 0 1 WDT Timeout PS0 - PS2 8 . PSA WDT Enable bit 0 1 0 1 Data Bus Set Flag Bit T0IF on Overflow 8 PSA Note 1: T0SE, T0CS, PSA, PS0-PS2 are bits in the Option Register. T0CS WDT Postscaler/ TMR0 Prescaler |
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