MP6528 – 5V TO 60V, H-BRIDGE GATE DRIVER

MP6528 Rev. 1.03

www.MonolithicPower.com

11

6/20/2017

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© 2017 MPS. All Rights Reserved.

OPERATION

The MP6528 is an H-bridge gate driver that

drives two N-channel MOSFET half-bridges, with

0.8A source and 1A sink current capability.

It

operates over a wide input voltage range of 5V to

60V, generating a boosted gate drive voltage

when the input supply is below 12V. The MP6528

features a low-power sleep mode, which disables

the device and draws a very low supply current.

The MP6528 provides several flexible functions,

such as adjustable dead-time control and over-

current protection, which allow the device to

cover a wide range of application fields.

Power-Up Sequence

The power-up sequence is initiated by the

application of voltage to VIN pin.

To initiate

power-up, VIN must be above the undervoltage

After power-up begins, the VREG supply starts

operating.

VREG must rise above V

REG_RISE

before the device becomes functional.

The power-up process takes between 1mS and

2mS, after which the MP6528 will respond to

logic inputs and drive the outputs.

Gate Drive Power Supplies

Gate drive voltages are generated from the input

power, VIN.

A regulated charge pump doubler

circuit supplies a voltage of approximately 11.5V

at the VREG pin. This voltage is used for the

low-side gate drive supply.

The charge pump

requires external capacitors between the CPA

and CPB pins, and from VREG to ground.

The high side gate drive is generated by a

combination of a bootstrap capacitor and an

internal “trickle” charge pump.

Bootstrap

capacitors are charged to the VREG voltage

when the low side MOSFET is turned on. This

charge is then used to drive the high side

MOSFET gate when it is turned on.

To keep the bootstrap capacitors charged and

allow operation at 100% duty cycle, an internal

“trickle” charge pump supplies a small current

(about 5µA) to overcome leakages that would

discharge the bootstrap capacitors.

Refer to the applications information section for

details on the selection of external components.

Sleep Mode (nSLEEP Input)

Driving nSLEEP low will put the device into a

low-power sleep state. In this state, all the

internal circuits are disabled, and all inputs are

ignored. nSLEEP has an interval pulldown, so it

must be driven high for the device to operate.

When exiting sleep mode, the part will initiate the

power-up sequence described above.

Input Logic

The ENx input pins controls both the high- and

low-side gate drive outputs of each phase. When

ENx is low, the gate drive outputs are pulled low,

and the PWMx input of that phase is ignored.

When ENx is high, the gate drive outputs are

enabled, and the PWM input is recognized. Refer

to Table 1 for the logic truth table.

Table 1: Input Logic Truth Table

ENx

PWMx

SHx

H

H

VIN

H

L

GND

L

x

High impedance

Low-side Automatic Turn-on

To ensure that the bootstrap capacitor is charged

enough to turn on the high-side MOSFET, each

time that the ENx pin transitions from low to

active high, the low-side MOSFET for that phase

regardless of the state of the PWMx input pin.

nFAULT

The nFAULT output pin reports to the system

when a fault condition (such as an output short

circuit,

overcurrent,

or

overtemperature)

is

detected. nFAULT is an open-drain output, and it

is driven low when a fault condition occurs. If the

fault condition is released, nFAULT is pulled high

by an external pull-up resistor.

To protect the power stage from damage due to

high

currents,

a

VDS

sensing

circuitry

is

implemented in the MP6528. The voltage drop

across each MOSFET is sensed. (This voltage is