ISL6569ACR datasheet(16/22 Pages) RENESAS

16 / 22 page

ISL6569A

FN9092 Rev 2.00

Page 16 of 22

Dec 29, 2004

current (see Equation 1); d is the duty cycle (VOUT/VIN); and

L is the per-channel inductance.

An additional term can be added to the lower-MOSFET loss

equation to account for additional loss accrued during the

dead time when inductor current is flowing through the

lower-MOSFET body diode. This term is dependent on the

diode forward voltage at IM, VD(ON); the switching

frequency, fS; and the length of dead times, td1 and td2, at

the beginning and the end of the lower-MOSFET conduction

interval respectively.

Thus the total maximum power dissipated in each lower

MOSFET is approximated by the summation of PL and PD.

UPPER MOSFET POWER CALCULATION

In addition to rDS(ON) losses, a large portion of the upper-

MOSFET losses are due to currents conducted across the

input voltage (VIN) during switching. Since a substantially

higher portion of the upper-MOSFET losses are dependent

on switching frequency, the power calculation is more

complex. Upper MOSFET losses can be divided into

separate components involving the upper-MOSFET

switching times; the lower-MOSFET body-diode reverse-

recovery charge, Qrr; and the upper MOSFET rDS(ON)

conduction loss.

When the upper MOSFET turns off, the lower MOSFET

does not conduct any portion of the inductor current until the

voltage at the phase node falls below ground. Once the

lower MOSFET begins conducting, the current in the upper

MOSFET falls to zero as the current in the lower MOSFET

ramps up to assume the full inductor current. In Equation 15,

the required time for this commutation is t1 and the

approximated associated power loss is PUP,1.

The upper MOSFET begins to conduct and this transition

occurs over a time t2. In Equation 16, the approximate power

loss is PUP,2.

A third component involves the lower MOSFET’s reverse-

recovery charge, Qrr. Since the inductor current has fully

commutated to the upper MOSFET before the lower-

MOSFET’s body diode can draw all of Qrr, it is conducted

through the upper MOSFET across VIN. The power

dissipated as a result is PUP,3 and is approximately

Finally, the resistive part of the upper MOSFET’s dissipation

is given in Equation 18 as PUP,4.

In this case, of course, rDS(ON) is the on resistance of the

upper MOSFET.

The total power dissipated by the upper MOSFET at full load

can now be approximated as the summation of the results

from Equations 15, 16, 17 and 18. Since the power

equations depend on MOSFET parameters, choosing the

correct MOSFETs can be an iterative process that involves

repetitively solving the loss equations for different MOSFETs

and different switching frequencies until converging upon the

best solution.

Current Sensing

The ISEN pins are denoted ISEN1 and ISEN2. The resistors

connected between these pins and their respective phase

nodes determine the gain in the load-line regulation loop and

the channel-current balance loop. Select the values for these

resistors based on the room temperature rDS(ON) of the

lower MOSFETs; the full-load operating current, IFL;

according to Equation 19 (see also Figure 4).

In certain circumstances, it may be necessary to adjust the

value of one or both of the ISEN resistors. This can arise

when the components of one channel are inhibited from

dissipating their heat so that the affected channel runs hotter

than desired (see the section entitled Channel-Current

Balance). In this case, chose a new, smaller value of RISEN

for the affected phase. Choose RISEN,2 in proportion to the

desired decrease in temperature rise in order to cause

proportionally less current to flow in the hotter phase.

In Equation 20, make sure that

T2 is the desired temperature

rise above the ambient temperature, and

T1 is the measured

temperature rise above the ambient temperature. While a

single adjustment according to Equation 20 is usually

sufficient, it may occasionally be necessary to adjust RISEN

two or more times to achieve perfect thermal balance

between both channels.

rDS ON



------





 2

–



ILPP

–



--------------------------------

(EQ. 13)

VDON

 fS

------

IPP

---------



 t

------

IPP

---------

–







td2

(EQ. 14)

PUP 1, VIN

------

IPP

---------



 t1

----









(EQ. 15)

PUP 2

VIN

------

IPP

---------

–



 t2

----









(EQ. 16)

PUP 3, VIN Qrr fS



(EQ. 17)

PUP 4,

rDS ON



------





 2

IPP

----------

(EQ. 18)

RISEN

rDS ON



50 10 6

–



-----------------------

IFL

--------

(EQ. 19)

RISEN 2,

RISEN

T

----------

(EQ. 20)

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