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CMV2000 датащи(PDF) 40 Page - ams AG

номер детали CMV2000
подробное описание детали  2.2 Megapixel machine vision CMOS image sensor
PDF  64 Pages
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производитель  AMSCO [ams AG]
домашняя страница  http://www.ams.com
Logo AMSCO - ams AG

CMV2000 датащи(HTML) 40 Page - ams AG

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Reference: CMV2000-datasheet-v3.8
CMV2000 v3 Datasheet
Page 39 of 63
© 2015 CMOSIS bvba
5.11 POWER CONTROL
The power consumption of the CMV2000 can be regulated by disabling the LVDS data channels when they are not used
(in 8, 4 or 2 outputs mode). The power will decrease with approximately 18mW per channel. So reducing the outputs
from 16 to 4 will save you about 216mW or 33%. This is the main source for power saving.
10-bit or 12-bit mode
Register name
Register address
Default value
Description of the value
Channel_en
80[7:0]
81[7:0]
82[2:0]
All ’1’
Bit 0-15 enable/disable the data output channels
Bit 16 enables/disables the clock channel
Bit 17 enables/disables the control channel
Bit 18 enables/disbales the LVDS clock input
0: disabled
1: enabled
Decreasing the master clock frequency and thereby the LVDS clock frequency will also decrease power consumption
albeit little. Decreasing the LVDS_CLK frequency from 480MHz to 128MHz will decrease power consumption with about
25mW. All power savings will happen on the VDD20 supply. Other settings or factors have little to no effect on the
power consumption.
5.12 OFFSET AND GAIN
5.12.1 OFFSET
A digital offset can be applied to the output signal. This dark level offset can be programmed by setting the desired value
in the sequencer register. The 14 bit register value is a 2-complement number, allowing us to have a positive and a
negative offset (from 8191 to -8192). The ADC itself has a fixed offset of 70.
So the dark-level @ output = 70 + Offset (in 2’s complement). For example register value 16323 (11 1111 1100 0011)
equals -61 in 2’s complement. The default dark-level is thus set at 70 -61 = 9 digital numbers.
Offset
Register name
Register address
Default
value
Description of the value
Offset
100[7:0]
101[5:0]
16323
Defines the dark level offset applied to the output signal
(min = 0, max = 16383).
The value is in 2’s complement:
Decimal
Binary
2’s Comp.
0
00 0000 0000 0000
0
1
00 0000 0000 0001
1
8191
01 1111 1111 1111
8191
8192
10 0000 0000 0000
-8192
8193
10 0000 0000 0001
-8191
16383
11 1111 1111 1111
-1



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