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CMV2000 датащи(PDF) 3 Page - ams AG |
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CMV2000 датащи(HTML) 3 Page - ams AG |
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3 / 64 page ![]() Reference: CMV2000-datasheet-v3.8 CMV2000 v3 Datasheet Page 2 of 63 © 2015 CMOSIS bvba Change record Issue Date Modification 1 06/05/2009 Origination 1.1 12/11/2009 - Corrected register address of sub_s[7:0] to ‘35’ (p 29/30/33) 1.2 11/01/2010 Adjusted min input frequency (chapter 3.5) 1.3 14/01/2010 Adjusted pin width in package drawing 2.7 29/03/2010 Added spectral response Added spectral response for color devices Updated specifications for version 2 devices Changed VDD18 to VDD20 Added ordering info Added handling and soldering procedures Removed “confidential” from footer Added recommended and adjustable register settings 2.1 22/7/2010 Frame rate calculation included 2.2 2/8/2010 Read-out in 12 bit mode added 2.3 1/9/2010 Added exposure time offset ((0.65 x register73 x clk_per x 129) 2.4 17/9/2010 Added Vtf_l1 to GND remark 2.5 19/10/2010 Added E12 spectral response curve and part numbers 2.6 11/1/2011 Added RGB Bayer pattern details 2.7 1/2/2011 Added electrical IO specifications 2.8 25/3/2011 Updated reflow soldering profile 2.9 13/4/2011 Changed tilt to 0.2 degrees, updated spectral response, changed exposure time formula 2.9.1 20/5/2011 Changed 12 bit read-out mode (removed 16 and 8 outputs) 3 1/9/2011 Complete revision for version 3 sensor 3.1 24/05/2012 Line up with v2.9.5 datasheet 3.2 30/07/2012 Added: - PLR Vlow2/3 enable bit - Sampling of digital inputs on rising CLK_IN - Details on LVDS data out in multiplex modes - CTR channel bits on Tdig1/2 pins - Evaluation kit available - Minimum time between Frame_req pulses in internal mode - Temperature sensor calibration example Updated: - Bayer pattern figure (pixel(0,0) green red). No actual device change compared to previous devices. - Supply noise influence - Control bit INTE1/2 (no FOT overlap) - FOT and Read-out time rounding - Detailed timing of control channel figure - LVDS clock delay figure (CLK_IN period) - SPI timing from SPI upload to Frame_req (1µs 1ms) - Total power use (600mW 650mW) - VDD33 power use (165mW 200mW) - VDD supplies internal PLL Removed: - Reference errors |
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