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LTC4366 датащи(PDF) 19 Page - Linear Technology |
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LTC4366 датащи(HTML) 19 Page - Linear Technology |
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19 / 24 page ![]() LTC4366 436612fe For more information www.linear.com/LTC4366 19 APPLICATIONS INFORMATION VDD SD R1 470k R2 100k OUT CG 2nF GATE M1 IXTH12N100L SD FB CT 3.3nF C1 0.47µF RFB1 12.4k VOUT 0.5A (200V CLAMP) VIN 160V (RECTIFIED 110V AC) 100V TO 800V RFB2 2M 436612 F07 RSS 412k RG 10 RIN 4.64M Q1 BF722 LTC4366-2 TIMER BASE VSS DANGER! Lethal Voltages Present Figure 7. Rectified 110V AC Supply Protected from 220V AC times time or P2t. Knowing the power we then adjust the time using the timer capacitor to limit the P2t during overvoltage. In this example the MOSFET data sheet has a 6400W2s P2t for a 10ms single pulse. In this application 250V minus 43V is applied across the MOSFET at 3A. If the power is applied for less than 16.5ms then MOSFET P2t limit is not exceeded: P = (250V – 43V) • 3A = 621W P2t = (621W)2 • 16.5ms = 6363W2s Prior to the moment when the output is regulated at 43V, the output is ramping from 28V to 43V. This ramp time is based on the 20µA gate current charging the 10nF capaci- tor. Using the equation for ramp time: ∆t = CG • ∆V IG = 10nF • 15V 20µA = 7.5ms To be safe we set the overvoltage time to 10ms. We set the regulation time to be 2.5ms (the remainder of the 10ms overvoltage time minus the ramp time). In this example it is assumed the 250V overvoltage is a constant DC volt- age for 10ms. This duration exceeds Mil-Std-1275 which specifies a 70µs surge to 250V that decays in 1.6ms. Us- ing the following equation (based on charging with 9µA) to set the CT: CT =IT • ∆t ∆V = 9µA • 2.5ms 2.8V ≈ 8.2nF In order to limit the SD pin current (10mA max) a collector resistor, R1, in series with Q1 is required. The maximum value for this resistor is around 5M. This requirement oc- curs when the pull-down is required to sink 1.6µA from SD and VDD is clamped at 12V. High valued resistors are susceptibletoleakagecurrentssowechosea470kresistor for R1. Resistor R2 provides ESD protection for Q1’s base. The gate resistor RG limits the parasitic trace capacitance on M1’s gate node that could lead to parasitic MOSFET self-oscillation. The recommended value for RG is 10Ω. High Voltage Application In Figure 7 the circuit accepts 110V AC (rectified to 160V) and protects the load from accidental connection to 220V AC by limiting the output to less than 200V. The circuit has a 100V to 800V VIN operating range where the FET breakdown voltage limits the maximum input voltage. The C1issetto0.47µFtoprovideabypassforthechargepump that is large enough to provide good noise immunity from outside voltage transients. The timer capacitor is sized to give a 1ms overvoltage regulation time that keeps the P2t below the 640W2s specified for this MOSFET. |
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