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CS7615 датащи(PDF) 28 Page - Cirrus Logic |
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CS7615 датащи(HTML) 28 Page - Cirrus Logic |
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28 / 36 page ![]() CS7615 28 DS231PP6 Timing Control - H1X Registers (5Fh-61h) 5Fh: 60h: 61h: Charge read out timing for VH1X in number of pixels. VH1F From HREF to leading edge of VH1X. Default is 18Fh. VH1R From HREF to trailing edge of VH1X. Default is 1ADh. Timing Control - VH1X Registers (62h-64h) 62h: 63h: 64h: Charge read out timing for VH3X in number of pixels. VH3F From HREF to leading edge of VH3X. Default is 1B7h. VH3R From HREF to trailing edge of VH3X. Default is 1D5h. 76 54 32 10 VH1F9 VH1F8 VH1F7 VH1F6 VH1F5 VH1F4 VH1F3 VH1F2 r/w r/w r/w r/w r/w r/w r/w r/w 76 54 32 10 VH1R9 VH1R8 VH1R7 VH1R6 VH1R5 VH1R4 VH1R3 VH1R2 r/w r/w r/w r/w r/w r/w r/w r/w 76 54 32 10 res res res res VH1R1 VH1R0 VH1F1 VH1F0 rr rr r/w r/w r/w r/w 76 54 32 10 VH3F9 VH3F8 VH3F7 VH3F6 VH3F5 VH3F4 VH3F3 VH3F2 r/w r/w r/w r/w r/w r/w r/w r/w 76 54 32 10 VH3R9 VH3R8 VH3R7 VH3R6 VH3R5 VH3R4 VH3R3 VH3R2 r/w r/w r/w r/w r/w r/w r/w r/w 76 54 32 10 res res res res VH3R1 VH3R0 VH3F1 VH3F0 rr rr r/w r/w r/w r/w |
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