HT85F2240 datasheet(82/147 Pages) HOLTEK

82 / 147 page

Rev. 1.10

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A/D Flash 8051 Core Low Pin Count MCU

HT85F2230/HT85F2240

IRCON Register

SFR Address: C0h

Bit

Name

EXF�

TF�

—

CCU1F

CCU0F

—

R/W

—

R/W

—

POR

—

Bit 7

EXF2: Timer 2 external reload interrupt request flag

0: No request

1: Interrupt request

The EXF2 bit will be set high by a negative transition on the T2EX pin. This bit must

be cleared using the application program. The EXF2 bit will be invalid in the Timer 2

Timer/Counter mode.

Bit 6

TF2: Timer 2 overflow interrupt request flag

0: No request

1: Interrupt request

This bit must be cleared using the application program.

Bit 5~4

Unimplemented, read as “0”

Bit 3

CCU1F: CCU1 interrupt request flag

0: No request

1: Interrupt request

This bit will be set high when Timer 2 compare mode is enabled and counter value (TH2,

TL2) is equal to Compare/Capture register 1 (CCH1, CCL1). Additionally, this bit can

be set high when Timer 2 Capture mode 0 is enabled and a rising edge is detected on

CC1 input pin. Once the program into the interrupt subroutine, the CCU1F flag will be

cleared by hardware automatically.

Bit 2

CCU0F: CCU0 interrupt request flag

0: No request

1: Interrupt request

This bit will be set high when Timer 2 compare mode is enabled and counter value (TH2,

TL2) is equal to Compare/Reload/Capture register 3 (CRCH, CRCL). Additionally, this

bit can be set high when Timer 2 Capture mode 0 is enabled and a rising or falling edge

(depending on the I3FR bit) is detected on CC0 input pin. Once the program into the

interrupt subroutine, the CCU0F flag will be cleared by hardware automatically.

Bit 1~0

Unimplemented, read as “0”

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