HT85F2240 datasheet(7/147 Pages) HOLTEK

7 / 147 page

Rev. 1.10

7 of 147

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A/D Flash 8051 Core Low Pin Count MCU

HT85F2230/HT85F2240

List of Tables

Program Memor� Register List ................................................................................................................ �9

FMAR0 Register – F�ash Program Memor� Address Register 0 ............................................................. �9

FMAR1 Register – F�ash Program Memor� Address Register 1 ............................................................. �0

FMAR� Register – F�ash Program Memor� Address Register � ............................................................. �0

FMDR Register – F�ash Program Memor� Data Register ...................................................................... �0

FMCR Register – F�ash Program Memor� Contro� Register .................................................................. �1

FMKEY Register – F�ash Program Memor� Un�ock Ke� Data Register ................................................. ��

FMSR Register – F�ash Program Memor� Stat�s Register .................................................................... ��

HT8�F��40 Program Memor� Contents.................................................................................................. �9

HT8�F��0 Program Memor� Contents.................................................................................................. �9

Sec�rit� B�tes.......................................................................................................................................... 40

Genera� P�rpose Data RAM� �0H~�FH� Bit Address Map ...................................................................... 44

Specia� F�nction Register Bit Addresses Map......................................................................................... 4�

Specia� F�nction Register Map................................................................................................................ 46

DPS Register – Data Pointer Se�ect Register.......................................................................................... 48

DPC Register – Data Pointer Contro� Register........................................................................................ 49

PSW Register – Program Stat�s Word Register ..................................................................................... �0

Cr�sta� Recommended Capacitor Va��es ................................................................................................ ��

S�stem C�ock Contro� Register – SCCR.................................................................................................. ��

High Speed Osci��ator Contro� Register – HSOCR .................................................................................. �6

HIRC Freq�enc� Se�ect Contro� Register – HFSCR................................................................................ �6

Low Speed Osci��ator Contro� Register – LSOCR ................................................................................... �7

PCON Register – Power Contro� Register............................................................................................... �8

WDT Register Contents........................................................................................................................... 61

IEN0 Register .......................................................................................................................................... 61

IEN1 Register .......................................................................................................................................... 6�

WDTREL Register ................................................................................................................................... 6�

WDTCR Register ..................................................................................................................................... 6�

IP0 Register ............................................................................................................................................. 6�

Watchdog Timer Enab�e/Disab�e Contro�................................................................................................. 64

LVDCR Register ...................................................................................................................................... 66

Reset So�rce S�mmar�........................................................................................................................... 67

RSTSRC Register.................................................................................................................................... 68

LVRCR Register ...................................................................................................................................... 71

IP0 Register ............................................................................................................................................. 7�

T�CON1 Register .................................................................................................................................... 7�

Software Reset S�mmar�........................................................................................................................ 7�

SRST Register......................................................................................................................................... 74

WDTCR Register ..................................................................................................................................... 74

LVRCR Register....................................................................................................................................... 7�

Interr�pt Register Bit Naming Conventions ............................................................................................. 80

Interr�pt Register Contents...................................................................................................................... 80

IEN0 Register ......................................................................................................................................... 81

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