AD9671KBCZ datasheet(22/61 Pages) AD

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Data Sheet

AD9671

Rev. A| Page 21 of 60

THEORY OF OPERATION

POST

AMP

LNA

GAIN–

DEMOD/

DEC

FILTER

ATTENUATOR

–45dB TO 0dB

GAIN

INTERPOLATOR

PIPELINE

ADC

LOSW-x

LO-x

LI-x

LG-x

RESET+

MLO+

MLO–

RFB2

RFB1

GENERATION

15.6dB,

17.9dB,

21.6dB

21dB,

24dB,

27dB,

30dB

CLG

CSH

TRANSDUCER

T/R

SWITCH

GAIN+

SERIAL

CML

NCO

TX_TRIG–

TX_TRIG+

RESET–

CWQ+

CWQ–

CWI+

CWI–

SERDOUT1+

TO SERDOUT4+

SERDOUT1–

TO SERDOUT4–

SYSREF+

SYSREF–

SYNCINB+

SYNCINB–

Figure 33. Simplified Block Diagram of a Single Channel

Each channel in the AD9671 contains both a TGC signal path and

a CW Doppler signal path. Common to both signal paths, the

LNA provides four user adjustable input impedance termination

options for matching different probe impedances. The CW

Doppler path includes an I/Q demodulator with programmable

phase rotation needed for analog beamforming. The TGC path

includes a differential X-AMP® VGA, an AAF, an ADC, and a

digital demodulator and decimator. Figure 33 shows a simplified

block diagram with external components.

TGC OPERATION

The system gain for TGC operation is distributed as listed in

Table 7.

Table 7. Channel Analog Gain Distribution

Section

Nominal Gain (dB)

LNA

15.6/17.9/21.6 (LNAGAIN)

Attenuator

−45 to 0 (VGAATT)

VGA Amplifier

21/24/27/30 (PGAGAIN)

Filter

ADC

Each LNA output is dc-coupled to a VGA input. The VGA

consists of an attenuator with a range of −45 dB to 0 dB followed

by an amplifier with 21 dB, 24 dB, 27 dB, or 30 dB of gain. The

X-AMP gain interpolation technique results in low gain error

and uniform bandwidth, and differential signal paths minimize

distortion.

The linear in dB gain (law conformance) range of the TGC path is

45 dB. The slope of the gain control interface is 14 dB/V, and the

gain control range is −1.6 V to +1.6 V. Equation 1 is the expression

for the differential voltage, VGAIN, at the gain control interface.

Equation 2 is the expression for the VGA attenuation, VGAATT,

as a function of VGAIN.

VGAIN (V) = (GAIN+) − (GAIN−)

(1)

VGAATT (dB) = −14 (dB/V) × (1.6 − VGAIN)

(2)

Then calculate the total channel gain as in Equation 3.

ChannelGain (dB) = LNAGAIN + VGAATT + PGAGAIN

(3)

In its default condition, the LNA has a gain of 21.6 dB (12×),

and the VGA postamplifier gain is 24 dB. If the voltage on the

GAIN+ pin is 0 V and the voltage on the GAIN− pin is 1.6 V

(44.8 dB attenuation), the total gain of the channel is 0.8 dB if

the LNA input is unmatched. The channel gain is −5.2 dB if the

LNA is matched to 50 Ω (RFB = 300 Ω). However, if the voltage on

the GAIN+ pin is 1.6 V and the voltage on the GAIN− pin is 0 V

(0 dB attenuation), VGAATT is 0 dB. This results in a total gain of

45.6 dB through the TGC path if the LNA input is unmatched, or

in a total gain of 39.6 dB if the LNA input is matched. Similarly,

if the LNA input is unmatched and has a gain of 21.6 dB (12×),

and the VGA postamp gain is 30 dB, the channel gain is

approximately 52 dB with 0 dB VGAATT.

In addition to the analog VGA attenuation described in Equation 2,

the attenuation level can be digitally controlled in 3.5 dB increments.

Equation 3 is still valid, and the value of VGAATT is equal to the

attenuation level set in Address 0x011, Bits[7:4].

Low Noise Amplifier (LNA)

Good system sensitivity relies on a proprietary ultralow noise

LNA at the beginning of the signal chain, which minimizes the

noise contribution in the following VGA. Active impedance

control optimizes noise performance for applications that

benefit from input impedance matching.

The LNA input, LI-x, is capacitively coupled to the source.

An on-chip bias generator establishes dc input bias voltages of

approximately 2.2 V and centers the output common-mode

levels at 1.5 V (AVDD2 divided by 2). A capacitor, CLG, of the

same value as the input coupling capacitor, CS, is connected

from the LG-x pin to ground.

The LNA supports three gains, 21.6 dB, 17.9 dB, or 15.6 dB, set

through the SPI. Overload protection ensures quick recovery

time from large input voltages.

Low value feedback resistors and the current driving capability

of the output stage allow the LNA to achieve a low input

referred noise voltage of 0.78 nV/√Hz (at a gain of 21.6 dB).

On-chip resistor matching results in precise single-ended gains,

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