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OX16CF950 датащи(PDF) 9 Page - List of Unclassifed Manufacturers

номер детали OX16CF950
подробное описание детали  LOW COST ASYNCHRONOUS 16 BIT CARD
PDF  60 Pages
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производитель  ETC [List of Unclassifed Manufacturers]
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OX16CF950 датащи(HTML) 9 Page - List of Unclassifed Manufacturers

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Page 9
OXCF950 DATA SHEET V1.1
OXFORD SEMICONDUCTOR LTD.
4
CONFIGURATION & OPERATION
PCMCIA and CF host systems allow for hot insertion of
cards.
Once a card has been inserted into a host system, the host
system will configure it. The PCMCIA standard defines two
card detect pins, that allow the host to be notified when a
card is inserted or removed.
By default the device will power up in either Normal or
Local Bus mode, depending on the mode pin. The
difference between these two modes is given in the
following table. Note that the Local Bus mode is not
suitable for CF systems.
Normal Mode (MODE=0)
Local Bus Mode (MODE=1)
Address bus is 8 bits wide.
Address bus is 4 bits wide.
Indirect access is not used.
Indirect access is used.
No external local bus.
External local bus supported.
Table 2: Differences between Normal & Local Bus Mode
The host system will wait for the READY# signal to be
active before reading the Card Information Structure, given
in attribute memory within the device. By reading this tuple
information, the host system is able to identify the device
type and the necessary resources requested by the device.
The host system will then load the device-driver software
according to this information and will configure the IO,
memory and interrupt resources. After determining that the
device is a memory and IO type device the host will enable
it’s IO mode by writing to the device’s Configuration
Options Register in attribute memory space. Device
drivers can then access the functions at the assigned
addresses.
A set of local configuration registers have been provided
that can be used to control the device’s characteristics
(such as interrupt handling) and report internal functional
status. These registers can be accessed in IO space,
utilising the same IO space as the local bus (Local Bus
mode only) and are situated above the UART registers.
These local registers can be set up by device drivers or
from the optional EEPROM.
The EEPROM can also be used to redefine the reset
values of all register areas to tailor the device to the end
users requirements if the default values do not meet the
specific requirements of the manufacturer.
This re-
programming of the device can also be performed for the
CIS area, allowing the manufacturer to mo dify resources
required, or Manufacturer ID values for example. As an
additional enhancement, the EEPROM can be used to pre-
program the UART, allowing pre-configuration, without
requiring device driver changes. This allows the enhanced
features of the integrated UART to be in place prior to
handover to any generic device drivers.
Note that a default set of tuples is provided for both
operating modes thus allowing for a single chip solution in
either mode.



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