AD7664ASTZ datasheet(14/25 Pages) AD

14 / 25 page

REV.

AD7664

–13–

Analog Input

Figure 6 shows an equivalent circuit of the input structure of

the AD7664.

OR INGND

AGND

AVDD

Figure 6. Equivalent Analog Input Circuit

The two diodes D1 and D2 provide ESD protection for the

analog inputs IN and INGND. Care must be taken to ensure

that the analog input signal never exceeds the supply rails by more

than 0.3 V. This will cause these diodes to become forward-

biased and start conducting current. These diodes can handle

a forward-biased current of 100 mA maximum. For instance,

these conditions could eventually occur when the input buffer’s

(U1) supplies are different from AVDD. In such cases, an input

buffer with a short circuit current limitation can be used to

protect the part.

This analog input structure allows the sampling of the differen-

tial signal between IN and INGND. Unlike other converters,

the INGND input is sampled at the same time as the IN input.

By using this differential input, small signals common to both

inputs are rejected, as shown in Figure 7, which represents the

typical CMRR over frequency. For instance, by using INGND

to sense a remote signal ground, difference of ground potentials

between the sensor and the local ADC ground are eliminated.

FREQUENCY – Hz

100k

10k

Figure 7. Analog Input CMRR vs. Frequency

During the acquisition phase, the impedance of the analog input

IN can be modeled as a parallel combination of capacitor C1

and the network formed by the series connection of R1 and C2.

Capacitor C1 is primarily the pin capacitance. The resistor R1 is

typically 140

Ω and is a lumped component made up of some

serial resistors and the on resistance of the switches. The capacitor

C2 is typically 60 pF and is mainly the ADC sampling capacitor.

During the conversion phase, where the switches are opened, the input

impedance is limited to C1. The R1, C2 makes a one-pole low-pass

filter that reduces the undesirable aliasing effect and limits the noise.

When the source impedance of the driving circuit is low, the

AD7664 can be driven directly. Large source impedances will

significantly affect the ac performances, especially the total

harmonic distortion (THD). The maximum source impedance

depends on the amount of THD that can be tolerated. The

THD degrades in function of the source impedance and the

maximum input frequency as shown in Figure 8.

FREQUENCY – kHz

100

–85

–90

–95

–100

–70

–80

1000

–75

R = 11

R = 100

R = 50

Figure 8. THD vs. Analog Input Frequency and

Source Resistance

Driver Amplifier Choice

Although the AD7664 is easy to drive, the driver amplifier needs

to meet at least the following requirements:

• The driver amplifier and the AD7664 analog input circuit

must be able, together, to settle for a full-scale step of the

capacitor array at a 16-bit level (0.0015%). In the amplifier’s

data sheet, the settling at 0.1% to 0.01% is more commonly

specified. It could significantly differ from the settling time at

16-bit level and it should, therefore, be verified prior to the

driver selection. The tiny op amp AD8021, which combines

ultralow noise and a high gain bandwidth, meets this settling

time requirement even when used with high gain up to 13.

• The noise generated by the driver amplifier needs to be kept as

low as possible in order to preserve the SNR and transition

noise performance of the AD7664. The noise coming from

the driver is filtered by the AD7664 analog input circuit one-

pole low-pass filter made by R1 and C2 or the external filter, if

any is used. The SNR degradation due to the amplifier is:

SNR

fNe

LOSS

–3dB

()













784

log

where:

f–3 dB is the –3 dB input bandwidth in MHz of the AD7664

(18 MHz) or the cutoff frequency of the input filter, if

any used.

is the noise gain of the amplifier (1, if in buffer

configuration).

is the equivalent input noise voltage of the op amp in

nV/

√Hz.

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