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AD7992 датащи(PDF) 19 Page - Analog Devices |
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AD7992 датащи(HTML) 19 Page - Analog Devices |
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19 / 29 page ![]() AD7992 Rev. 0 | Page 18 of 28 CONVERSION RESULT REGISTER The conversion result register is a 16-bit, read-only register that stores the conversion result from the ADC in straight binary format. A 2-byte read is needed to read data from this register. Table 12 shows the contents of the first byte to be read from the AD7992, and Table 13 shows the contents of the second byte. Table 12. Conversion Value Register (First Read) D15 D14 D13 D12 D11 D10 D9 D8 Alert_Flag Zero Zero CHID0 MSB B10 B9 B8 Table 13. Conversion Value Register (Second Read) D7 D6 D5 D4 D3 D2 D1 D0 B7 B6 B5 B4 B3 B2 B1 B0 The AD7992 conversion result consists of an Alert_Flag bit, two leading zeros, a channel identifier bit, and the 12-bit data result. The Alert_Flag bit indicates whether the conversion result being read or any other channel result has violated the limit registers associated with it. If an ALERT occurs, the master may wish to read the ALERT status register to obtain more informa- tion on where the ALERT occurred if the Alert_Flag bit is set. The Alert_Flag bit is followed by two leading zeros and a channel identifier bit that indicate to which channel the con- version result corresponds. When this bit is 0, the conversion result corresponds to VIN1, and when it is 1, the conversion result corresponds to VIN2. These, in turn, are followed by the 12-bit conversion result, MSB first. LIMIT REGISTERS The AD7992 has two pairs of limit registers. Each pair stores high and low conversion limits for both analog input channels. Each pair of limit registers has one associated hysteresis register. All 6 registers are 16 bits wide; only the 12 LSBs of the registers are used. On power-up, the contents of the DATAHIGH register for each channel are full scale, while the contents of the DATALOW registers are zero scale by default. The limit registers can be used to monitor the conversion results on one or both channels. The AD7992 signals an ALERT (in either hardware or software or both, depending on the configuration) if the result moves outside the upper or lower limit set by the user. DATAHIGH Register CH1/CH2 The DATAHIGH register for a channel is a 16-bit, read/write register; only the 12 LSBs of each register are used. This register stores the upper limit that activates the ALERT output and/or the Alert_Flag bit in the conversion result register. If the value in the conversion result register is greater than the value in the DATAHIGH register, an ALERT occurs. When the conversion result returns to a value at least N LSB below the DATAHIGH register value, the ALERT output pin and Alert_Flag bit are reset. The value of N is taken from the 12-bit hysteresis register associated with that channel. The ALERT pin can also be reset by writing to Bits D2 and D1 in the configuration register. Table 14. AD7992 DATAHIGH Register (First Read/Write) D15 D14 D13 D12 D11 D10 D9 D8 0 0 0 0 B11 B10 B9 B8 Table 15. AD7992 DATAHIGH Register (Second Read/Write) D7 D6 D5 D4 D3 D2 D1 D0 B7 B6 B5 B4 B3 B2 B1 B0 DATALOW Register CH1/CH2 The DATALOW register for each channel is a 16-bit read/write register; only the 12 LSB of each register are used. The register stores the lower limit that activates the ALERT output and/or the Alert_Flag bit in the conversion result register. If the value in the conversion result register is less than the value in the DATALOW register, an ALERT occurs. When the conversion result returns to a value at least N LSB above the DATALOW register value, the ALERT output pin and Alert_Flag bit are reset. The value of N is taken from the hysteresis register associated with that channel. The ALERT output pin can also be reset by writing to Bits D2 and D1 in the configuration register. Table 16. DATALOW Register (First Read/Write) D15 D14 D13 D12 D11 D10 D9 D8 0 0 0 0 B11 B10 B9 B8 Table 17. DATALOW Register (Second Read/Write) D7 D6 D5 D4 D3 D2 D1 D0 B7 B6 B5 B4 B3 B2 B1 B0 Hysteresis Register (CH1/CH2) Each hysteresis register is a 16-bit read/write register; only the 12 LSBs of the register are used. The hysteresis register stores the hysteresis value, N, when using the limit registers. Each pair of limit registers has a dedicated hysteresis register. The hysteresis value determines the reset point for the ALERT pin/Alert_Flag if a violation of the limits has occurred. For example, if a hysteresis value of 8 LSB is required on the upper and lower limits of Channel 1, the 16 bit word, 0000 0000 0000 1000, should be written to the hysteresis register of CH1 (see Table 8 for the address of this register). On power-up, the hysteresis registers contain a value of 8 LSB. If a different hysteresis value is required, that value must be written to the hysteresis register for the channel in question. Table 18. Hysteresis Register (First Read/Write) D15 D14 D13 D12 D11 D10 D9 D8 0 0 0 0 B11 B10 B9 B8 Table 19. Hysteresis Register (Second Read/Write) D7 D6 D5 D4 D3 D2 D1 D0 B7 B6 B5 B4 B3 B2 B1 B0 |
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