AD7992

Rev. 0 | Page 17 of 28

CONFIGURATION REGISTER

The configuration register is a 8-bit, read/write register that is used to set the operating modes of the AD7992. The MSB of the register is

unused and is a don’t care bit. The bit functions of the configuration register are outlined in Table 9. A single-byte write is necessary when

writing to the configuration register.

Table 9. Configuration Register Bit Function Descriptions and Default Settings at Power-Up

D7

D6

D5

D4

D3

D2

D1

D0

DONTC

Single/Dual

CH2

CH1

FLTR

ALERT EN

BUSY/ALERT

ALERT/BUSY POLARITY

0

0

0

0

1

0

0

0

Bit

Mnemonic

Comment

D7

DONTC

Don’t care bit.

D6

Single/Dual

conversion, the reference can also be taken from the supply voltage by setting D6 to 0. When this bit is a 0, the

reference being taken from the supply voltage. See Table 10.

D5, D4

CH2, CH1

These two channel address bits select which analog input channel is to be converted. A 1 in any of Bits D5 or D4

selects a channel for conversion. If more than one channel bit is set (with D6 = 0), the alternating channel

sequence is used. Table 10 shows how these two channel address bits are decoded. If D5 is selected, the part

operates in dual-channel mode, with the reference for the ADC being taken from the supply voltage (D6 set to 0

for dual-channel mode).

D3

FLTR

The value written to this bit of the control register determines whether the filtering on SDA and SCL is enabled or

is bypassed. If this bit is a 1, the the filtering is enabled; if it is a 0, the filtering is bypassed.

D2

ALERT EN

The hardware ALERT function is enabled if this bit is set to 1 and disabled if this bit is set to 0. This bit is used in

conjunction with the BUSY/ALERT bit to determine if the ALERT/BUSY pin acts as an ALERT or a BUSY output

(see Table 11).

D1

BUSY/ALERT

This bit is used in conjunction with the ALERT EN bit to determine if the ALERT/BUSY pin acts as an ALERT or

BUSY output (see Table 11), and if configured as an ALERT output pin, if it is to be reset.

D0

BUSY/ALERT

POLARITY

This bit determines the active polarity of the ALERT/BUSY pin regardless of whether it is configured as an ALERT

or BUSY output. It is active low if this bit is set to 0 and active high if set to 1.

Table 10. Channel and Reference Selection

D6

Single/Dual

D5

CH2

D4

CH1

Analog Input Channel

0

0

0

No conversion

0

0

1

1

0

1

0

1

0

0

1

1

Table 11. ALERT/BUSY Function

D2

D1

ALERT/BUSY Pin Configuration

0

0

Pin does not provide any interrupt signal.

0

1

Pin configured as a BUSY output.

1

0

Pin configured as an ALERT output.

1

1

Resets the ALERT output pin, the Alert_Flag bit in the conversion result register, and the entire alert status

register (if any is active). If 1/1 is written to Bits D2/D1 in the configuration register to reset the ALERT pin, the

Alert_Flag bit, and the alert status register, the contents of the configuration register read 1/0 for D2/D1,

respectively, if read back.