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AD9874ABST датащи(PDF) 13 Page - Analog Devices

номер детали AD9874ABST
подробное описание детали  IF Digitizing Subsystem
PDF  41 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

AD9874ABST датащи(HTML) 13 Page - Analog Devices

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REV. A
AD9874
–12–
FREQUENCY – MHz
13
0
6
12
11
10
9
8
7
50
500
100 150 200 250 300 350 400 450
24-BIT
16-BIT w/DVGA
TPC 13a. Noise Figure vs. Frequency
(Minimum Attenuation, fCLK = 18 MSPS,
BW = 10 kHz, High Bias)
FREQUENCY – MHz
13
0
6
12
11
10
9
8
7
50
500
100 150 200 250 300 350 400 450
24-BIT
16-BIT w/DVGA
TPC 14a. Noise Figure vs. Frequency
(Minimum Attenuation, fCLK = 26 MSPS,
BW = 24 kHz, High Bias)
INTERFERER LEVEL – dBm
20.0
–55
8.0
18.5
15.5
12.5
11.0
9.5
–5
–10
NOISE FIGURE
AGC
17.0
14.0
–15
–20
–25
–30
–35
–40
–45
–50
128
0
112
80
48
32
16
96
64
TPC 15a. Noise Figure vs. Interferer
Level (16-Bit Data, BW = 12.5 kHz,
AGCR = 1, fINTERFERER = fIF + 110 kHz)
FREQUENCY – MHz
13
0
6
12
11
10
9
8
7
50
500
100 150 200 250 300 350 400 450
24-BIT
16-BIT w/DVGA
TPC 13b. Noise Figure vs. Frequency
(Minimum Attenuation, fCLK = 18 MSPS,
BW = 10 kHz, Low Bias)
FREQUENCY – MHz
13
0
6
12
11
10
9
8
7
50
500
100 150 200 250 300 350 400 450
24-BIT
16-BIT w/DVGA
TPC 14b. Noise Figure vs. Frequency
(Minimum Attenuation, fCLK = 26 MSPS,
BW = 24 kHz, Low Bias)
INTERFERER LEVEL – dBm
16
–50
8
15
13
11
10
9
–10
–15
NOISE FIGURE
AGC ATTN
14
12
–20
–25
–30
–35
–40
–45
256
0
224
160
96
64
32
192
128
TPC 15b. Noise Figure vs. Interferer
Level (16-Bit Data with DVGA, BW =
12.5 kHz, AGCR = 1, fINTERFERER =
fIF + 110 kHz)
FREQUENCY – MHz
4
0
–10
2
0
–2
–4
–6
–8
50
500
100 150 200 250 300 350 400 450
LOW BIAS
HIGH BIAS
TPC 13c. Input IP3 vs. Frequency
(fCLK = 18 MSPS)
FREQUENCY – MHz
2
0
–10
0
–2
–4
–6
–8
50
500
100 150 200 250 300 350 400 450
LOW BIAS
HIGH BIAS
TPC 14c. Input IP3 vs. Frequency
(fCLK = 26 MSPS)
INTERFERER LEVEL – dBm
16
–65
8
15
13
11
10
9
–5
–15
NOISE FIGURE
AGC ATTN
14
12
–25
–35
–45
–55
128
0
32
96
64
TPC 15c. Noise Figure vs. Interferer
Level (24-Bit Data, BW = 12.5 kHz,
AGCR = 1, fINTERFERER = fIF + 110 kHz)
(VDDI = VDDF = VDDA = VDDC = VDDL = VDDD = VDDH = VDDx, VDDQ = VDDP = 5.0 V,
fCLK = 18 MSPS, fIF = 109.56 MHz, fLO = 107.4 MHz,
TA = 25 C, LO = –5 dBm, LO and CLK Synthesizer Disabled, 16-Bit Data with AGC and DVGA enabled, unless otherwise noted.)
1
1Data taken with Toko FSLM series 10
µH inductors.
2High Bias corresponds to LNA_Mixer Setting of 33 in SPI Register 0x01.
3Low Bias corresponds to LNA_Mixer Setting of 12 in SPI Register 0x01.



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