MFC2000 datasheet(162/426 Pages) ETC

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MFC2000 Multifunctional Peripheral Controller 2000

Hardware Description

7-14

Conexant

100723A

Bits 10-8 clock divider[2:0]

The clock used for PWM is scaled according to “clock divider” setting.

Bits 7-0

duty cycle[7:0]

The period of PWM is divided into 256. The high time of PWM is

determined by “duty cycle”.

Min frequency (clk_div = 7)

ihsclk = 50 ns

pwm clk = T(ihsclk ) * (clk_div + 1) = 50 ns * (7 + 1) = 400 ns

pwm period = 400 ns * 256 = 102,400 ns = 102.4 us (9.8 KHz)

Max frequency (clk_div = 0)

ihsclk = 50 ns

pwm clk = ihsclk = 50 ns

pwm period = 50 ns * 256 = 12.8 us (78.1 KHz)

Note: In order to have a non-modulated signal, the duty cycle must be set to 0xFF.

Name/Address

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Default

LED1 PWM Config

(LED1PWM)

$01FF88B5

(Not Used)

clock divider[2:0]

Rst. Value

xxxxx000b

Read Value

00h

Name/Address

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default

LED1 PWM Config

(LED1PWM)

$01FF88B4

duty cycle[7:0]

Rst. Value

00h

Read Value

00h

Bits 10-8 clock divider[2:0]

The clock used for PWM is scaled according to “clock divider” setting.

Bits 7-0

duty cycle[7:0]

The period of PWM is divided into 256. The high time of PWM is

determined by “duty cycle”.

Note: In order to have a non-modulated signal, the duty cycle must be set to 0xFF.

Name/Address

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Default

LED2 PWM Config

(LED2PWM)

$01FF88B7

(Not Used)

clock divider[2:0]

Rst. Value

xxxxx000b

Read Value

00h

Name/Address

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default

LED2 PWM Config

(LED2PWM)

$01FF88B6

duty cycle[7:0]

Rst. Value

00h

Read Value

00h

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