MFC2000 datasheet(147/426 Pages) ETC

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Hardware Description

MFC 2000 Multifunctional Peripheral Controller 2000

100723A

Conexant

6-5

6.5

Fax Timing Registers

Address:

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Default:

125 uS Prescaler

(125usPrescaler)

01FF8881

(Not Used)

Rst Value

xxh

Read Value

00h

Address:

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default:

125 uS Prescaler

(125usPrescaler)

01FF8880

n (8 bits) as applied in the equation: (n+1)*(ICLK period *8)

Rst Value

00h

Read Value

00h

Address:

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Default:

ICLK(AUXCLK)

Period

(ICLKPeriod)

01FF8883

(Not Used)

(Not Used) (Not Used)

(Not Used)

Rst Value

xxh

Read Value

00h

Address:

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default:

ICLK(AUXCLK)

Period

(ICLKPeriod)

01FF8882

(Not Used)

IHSCLK

Period

ICLK (AUXCLK) Period

ICLK=

SIUCLK/(ICLKPeriod + 1)

Rst Value

xxxxx111b

Read Value

07h

IHSCLK = MCLK/(IHSCLKPeriod + 1)

Address:

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Default:

Mechanical

Subsystem (MS)

Period

(MSINTPeriod)

01FF8885

(Not Used)

Rst Value

xxh

Read Value

00h

Address:

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default:

Mechanical

Subsystem (MS)

Period

(MSINTPeriod)

01FF8884

2MSIRQ

Select

0=1MSIRQ

1=2MSIRQ

(Not Used)

n (6 bits) as applied in the equation: (n+1)*125 uS Prescaler period)

Rst Value

0x000000b

Read Value

0x000000b

On Reset, the 125usPrescaler, 1-ms Timer, and MSINT counters are disabled. Writing to the MSINTPeriod

in order for the WatchDog and timing chains to operate correctly.

If a new value is written into the MSINTPeriod register while the MSINT counter is running, the new value is not

loaded into the counter until it counts down to 0.

1MS/2MSIRQ is a programmable interrupt source. If the ‘2MSIRQ Select’ bit (bit7) of the MSINTPeriod register is

set to 0, the interrupt is generated every 1ms (1.00708ms). If the ‘2MSIRQ Select’ bit (bit7) of the MSINTPeriod

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