MFC2000 datasheet(276/426 Pages) ETC

276 / 426 page

MFC2000 Multifunctional Peripheral Controller 2000

Hardware Description

14-10

Conexant

100723A

T.4 Data FIFO Holding Register for the coded data to/from the external memory (for DMA channel 10):

Address:

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Default:

T.4 Data FIFO

Holding Register

(T4Data1Hold)

$01FF8119

data

bit 15

data

bit 14

data

bit 13

data

bit 12

data

bit 11

data

bit 10

data

bit 9

data

bit 8

Rst Value

xxh

Read Value

xxh

Address:

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default:

T.4 Data FIFO

Holding Register

(T4Data1Hold)

$01FF8118

data

bit 7

data

bit 6

data

bit 5

data

bit 4

data

bit 3

data

bit 2

data

bit 1

data

bit 0

Rst Value

xxh

Read Value

xxh

T.4 Ref. Line Data FIFO Holding Register for the Uncoded data to/from the external memory

(for DMA channel 7):

Address:

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Default:

T.4 Ref. Line Data

FIFO Holding

(T4RefDataHold)

$01FF8159

data

bit 15

data

bit 14

data

bit 13

data

bit 12

data

bit 11

data

bit 10

data

bit 9

data

bit 8

Rst Value

xxh

Read Value

xxh

Address:

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default:

T.4 Ref. Line Data

FIFO Holding

(T4RefDataHold)

$01FF8158

data

bit 7

data

bit 6

data

bit 5

data

bit 4

data

bit 3

data

bit 2

data

bit 1

data

bit 0

Rst Value

xxh

Read Value

xxh

T.4 Current Line Data FIFO Holding Register for the Uncoded data to/from the external memory

(for DMA channel 6):

Address:

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Default:

T.4 Current Line

Data FIFO Holding

(T4CurDataHold)

$01FF8169

data

bit 15

data

bit 14

data

bit 13

data

bit 12

data

bit 11

data

bit 10

data

bit 9

data

bit 8

Rst Value

xxh

Read Value

xxh

Address:

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default:

T.4 Current Line

Data FIFO Holding

(T4CurDataHold)

$01FF8168

data

bit 7

data

bit 6

data

bit 5

data

bit 4

data

bit 3

data

bit 2

data

bit 1

data

bit 0

Rst Value

xxh

Read Value

xxh

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