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AD9239 датащи(PDF) 33 Page - Analog Devices |
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AD9239 датащи(HTML) 33 Page - Analog Devices |
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33 / 41 page ![]() AD9239 Data Sheet Rev. E | Page 32 of 40 NUMBER OF SDI/SDIO PINS CONNECTED TOGETHER 1.715 1.720 1.725 1.730 1.735 1.740 1.745 1.750 1.755 1.760 1.765 1.770 1.775 1.780 1.785 1.790 1.795 1.800 030 20 10 40 50 60 70 80 90 100 Figure 77. SDI/SDIO Pin Loading DON’T CARE DON’T CARE DON’T CARE DON’T CARE SDIO SCLK tS tDH tHI tCLK tLO tDS tH R/W W1 W0 A12 A11 A10 A9 A8A7 D5D4 D3D2 D1D0 CSB Figure 78. Serial Timing Details Table 15. Serial Timing Definitions Parameter Timing (Minimum, ns) Description tDS 5 Setup time between the data and the rising edge of SCLK tDH 2 Hold time between the data and the rising edge of SCLK tCLK 40 Period of the clock tS 5 Setup time between CSB and SCLK tH 2 Hold time between CSB and SCLK tHI 16 Minimum period that SCLK should be in a logic high state tLO 16 Minimum period that SCLK should be in a logic low state tEN_SDI/SDIO 10 Minimum time for the SDI/SDIO pin to switch from an input to an output relative to the SCLK falling edge (not shown in Figure 78) tDIS_SDI/SDIO 10 Minimum time for the SDI/SDIO pin to switch from an output to an input relative to the SCLK rising edge (not shown in Figure 78) |
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