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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AD7992 датащи(PDF) 19 Page - Analog Devices |
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AD7992 датащи(HTML) 19 Page - Analog Devices |
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19 / 21 page  AD7992 –19– REV. PrH PRELIMINARYTECHNICAL DATA Placing the AD7992-1 into High-speed Mode. Hs-Mode communication commences after the master addresses all devices connected to the bus with the Master code, 00001XXX, to indicate that a High-Speed Mode transfer is to begin. No device connected to the bus is allowed to Acknowledge the High-Speed Master code, therefore the code is followed by a not-Acknowledge, Fig- Figure 15. Placing the part into Hs-Mode MODES OF OPERATION When supplies are first applied to the AD7992, the ADC powers up in shutdown mode and will remain in this power-down state while not converting. There are three different methods of initiating a conversion on the AD7992. Mode 1 - Using CONVST Pin. A conversion can be initiated on the AD7992 by pulsing the CONVST signal. The conversion clock for the part is internally generated so no external clock is required, ex- cept when reading from, or writing to the serial port. On the rising edge of CONVST the AD7992 will begin to power up, see point A on Figure 16. The power up time from power-down mode for the AD7992 is approximately 1 us. The CONVST signal must remain high for 1 µs for the part to power up fully. Then CONVST can be brought low after 1 µs. The falling edge of the CONVST signal places the track and hold into hold mode and a conversion is also initiated at this point, see point B Fig- ure 16. When the conversion is complete, approximately 2 us later, the part will return to shutdown (see point C Figure 16) and remain so until the next rising edge of CONVST. The master can then read address the ADC to obtain the conversion result. The address point register must be pointing to the conversion result register in order to read back the conversion result. If the CONVST pulse does not remain high for more than 1 µs, then the falling edge of CONVST will still initiate a conversion but the result will be invalid as the AD7992 will not be fully powered up when the conversion takes place. The CONVST pin should not be pulsed when reading from or writing to the serial port. The Cycle Timer Register and the Command bits (C4 - C1) in the Address Pointer Register should contain all 0’s to operate the AD7992 in this mode. The CONVST pin should be tied low for all other Modes of operation. Prior to initiating a conversion in this mode, a write to the Con- figuration Register is necessary to select the Channel for conversion. To select both input channels for conversion set D5 and D4 to 1 in the Configuration Register. The ADC will service each channel in the sequence with each CONVST pulse. ure 15. The master must then issue a repeated start fol- lowed by the device Address with a R/ W bit. The selected device will then acknowledge its address. All devices continue to operate in Hs-Mode until such a time as the master issues a STOP condition. When the STOP condition is issued the devices all return to F/S Mode. Figure 16. Mode 1 Operation 1 1 9 SCL 9 S 7-BIT ADDRESS RA FIRST DATA BYTE (MSBs) A SECOND DATA BYTE (LSBs) 9 A P SDA tCONVERT CONVST tPOWER-UP B AC SDA ACK. BY AD7992 START BY MASTER HS-MODE MASTER CODE SERIAL BUS ADDRESS BYTE NACK. 19 1 9 0 1 A2 A1 A0 X X 1 0 0 0 SCL 0 0 A3 X Sr FAST MODE HIGH-SPEED MODE |
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