AD7771 datasheet(74/99 Pages) AD

74 / 99 page

Data Sheet

AD7771

Rev. 0 | Page 73 of 98

GENERAL USER CONFIGURATION 3 REGISTER

Address: 0x013, Reset: 0x80, Name: GENERAL_USER_CONFIG_3

Dis able deglitching of CONVST_SAR

11: No deglitch circuit.

10: CONVST_SAR Deglitch 1.5/ MCLK.

01: Res erved.

00: Res erved.

Dis ables the clock qualifier check

if the us er requires to use an MCLK

signal < 265kHz.

Enable to SPI s lave mode to read

back ADC on SDO

[7:6] CONVST_DEGLITCH_DIS (R/W)

[0] CLK_QUAL_DIS (R/W)

[5] RESERVED

[3:1] RESERVED

[4] SPI_SLAVE_MODE_EN (R/W)

Table 63. Bit Descriptions for GENERAL_USER_CONFIG_3

Bits

Bit Name

Settings

Description

Reset

Access

[7:6]

CONVST_DEGLITCH_DIS

Disable deglitching of CONVST_SAR pin.

0x2

R/W

Reserved.

CONVST_SAR deglitch 1.5/MCLK.

No deglitch circuit.

RESERVED

Reserved.

0x0

R/W

SPI_SLAVE_MODE_EN

Enable to SPI slave mode to read back ADC on SDO.

0x0

R/W

[3:2]

RESERVED

Reserved.

0x0

R/W

RESERVED

Reserved.

0x0

R/W

CLK_QUAL_DIS

Disables the clock qualifier check if the user requires to use an MCLK

signal <265 kHz.

0x0

R/W

DATA OUTPUT FORMAT REGISTER

Address: 0x014, Reset: 0x20, Name: DOUT_FORMAT

Data out format

11: 1 DOUT Lines .

10: 1 DOUT Lines .

01: 2 DOUT Lines .

00: 4 DOUT Lines .

Dout header form at

1: CRC Header.

0: Status Header.

Divide MCLK

111: Divide by 128.

110: Divide by 64.

101: Divide by 32.

100: Divide by 16.

011: Divide by 8.

010: Divide by 4.

001: Divide by 2.

000: Divide by 1.

[7:6] DOUT_FORMAT (R/W)

[0] RESERVED

[5] DOUT_HEADER_FORMAT (R/W)

[3:1] DCLK_CLK_DIV (R/W)

[4] RESERVED

Table 64. Bit Descriptions for DOUT_FORMAT

Bits

Bit Name

Settings

Description

Reset

Access

[7:6]

DOUT_FORMAT

Data Out Format

0x0

R/W

4 DOUTx lines

2 DOUTx lines

1 DOUTx lines

1 DOUTx line

DOUT_HEADER_FORMAT

DOUTx Header Format

0x1

R/W

Status header

CRC header

RESERVED

Reserved

0x0

R/W

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