RT3607CE datasheet(67/69 Pages) RICHTEK

67 / 69 page

RT3607CE

DS3607CE-01 June 2016

www.richtek.com

is a registered trademark of Richtek Technology Corporation.

Layout Considerations

Careful PC board layout is critical to achieve low switching

losses and clean, stable operation. The switching power

stage requires particular attention. If possible, mount all

power components on the top side of the board with their

ground terminals flushed against one another. Follow these

guidelines for optimum PC board layout :



Keep the high current paths short, especially at the

ground terminals.



Keep the power traces and load connections short. This

is essential for high efficiency.



When trade-offs in trace lengths must be made, it's

preferable to let the inductor charging path be longer

than the discharging path.



Place the current sense component close to the

controller. ISENxP and ISENxN connections for current

limit and voltage positioning must be made using Kelvin

sense connections to guarantee current sense accuracy.

The PCB trace from the sense nodes should be

paralleled back to the controller.



Route high speed switching nodes away from sensitive

analog areas (COMP, FB, ISENxP, ISENxN, etc...)



Users need to connect exposed pad to the ground plane

through low impedance path. Use at least 5 vias to

connect to ground planes in PCB internal layers is

recommended.

Figure 34. Derating Curve of Maximum Power

Dissipation

0.0

0.4

0.8

1.2

1.6

2.0

2.4

2.8

3.2

3.6

4.0

255075

100

125

Ambient Temperature (°C)

Four-Layer PCB

Thermal Considerations

For continuous operation, do not exceed absolute

maximum junction temperature. The maximum power

dissipation depends on the thermal resistance of the IC

package, PCB layout, rate of surrounding airflow, and

difference between junction and ambient temperature. The

maximum power dissipation can be calculated by the

following formula :

PD(MAX) = (TJ(MAX)

− TA) / θJA

where TJ(MAX) is the maximum junction temperature, TAis

the ambient temperature, and

θJAis the junction to ambient

thermal resistance.

For recommended operating condition specifications, the

maximum junction temperature is 125

°C. The junction to

ambient thermal resistance,

θJA, is layout dependent. For

WQFN-56L 6x6 package, the thermal resistance,

θJA, is

26.2

°C/W on a standard JEDEC 51-7 four-layer thermal

test board. The maximum power dissipation at TA = 25

°C

can be calculated by the following formula :

PD(MAX) = (125

°C − 25°C) / (26.2°C/W) = 3.81W for

WQFN-56L 6x6 package

The maximum power dissipation depends on the operating

ambient temperature for fixed TJ(MAX) and thermal

resistance,

θJA. The derating curve in Figure 34 allows

the designer to see the effect of rising ambient temperature

on the maximum power dissipation.

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