IRCC datasheet(58/79 Pages) SMSC

номер детали	IRCC

подробное описание детали	INFRARED COMMUNICATIONS CONTROLLER

PDF	79 Pages

Scroll/Zoom	100%

производитель	SMSC [SMSC Corporation]

домашняя страница	http://www.smsc.com

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58 / 79 page

When active, the DATA DONE flag in Register

Block Zero, Line Control Register A alerts the

transmitter that the next FIFO underrun condition

signifies the end of the valid payload data and

that an EOF should begin (Figure 24). During

DMA operations TC automatically sets the DATA

DONE flag.

A message byte counter that is initialized with the

value in the data size register when the message

begins can also signal the end of the valid

payload data. If the message byte counter goes

to zero before the FIFO is empty and the Brick

Wall bit is one, a FIFO underrun with an active

DATA DONE flag is simulated, a hardware CRC

is appended (if required), and the next message

is brick walled (not shown).

If the FIFO is empty, the DATA DONE flag is

always cleared following the EOM, regardless of

how the bit was set. If the DATA DONE flag is

inactive

when

underrun

occurs,

the

transmitter aborts the message and set the Abort

and Underrun errors appropriately (Figure 25).

EOF

FCS

BOF

EOM

EOM Interrupt

Tx Enable

Active Frame

Data Done

FIFO Empty

FIGURE 24 - IrDA FIR TX MESSAGE TIMING (SOFTWARE CRC)

BOF

EOM

EOM Interrupt

Tx Enable

Active Frame

Data Done/TC

FIFO Empty

Underrun Error

Abort Error

Abort

FIGURE 25 - TX ABORT ON UNDERRUN TIMING

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