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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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HT48R002 датащи(PDF) 9 Page - Holtek Semiconductor Inc |
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HT48R002 датащи(HTML) 9 Page - Holtek Semiconductor Inc |
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9 / 71 page  Rev. 1.11 8 April 11, 2017 Rev. 1.11 9 April 11, 2017 HT48R002/HT48R003 Cost-Effective I/O 8-Bit OTP MCU HT48R002/HT48R003 Cost-Effective I/O 8-Bit OTP MCU D.C. Characteristics Ta=25°C Symbol Parameter Test Conditions Min. Typ. Max. Unit VDD Conditions VDD Operating Voltage (HIRC) — fSYS=8MHz 2.3 — 5.5 V IDD1 Operating Current (HIRC on) 3V No load, fSYS=8MHz — 1.2 1.8 mA 5V — 2.4 3.6 mA ISTB1 Standby Current (LIRC on) 3V No load, system HALT — — 5 μA 5V — — 10 μA ISTB2 Standby Current (LIRC off) 3V No load, system HALT — — 1 μA 5V — — 2 μA VIL1 Input Low Voltage for I/O Ports, TMR and INT pin 5V — 0 — 1.5 V — 0 — 0.2VDD V VIH1 Input High Voltage for I/O Ports, TMR and INT pin 5V — 3.5 — 5 V — 0.8VDD — VDD V VIL2 Input low voltage (RES) — — 0 — 0.4VDD V VIH2 Input high voltage (RES) — — 0.9VDD — VDD V VLVR Low Voltage Reset Voltage — LVR Enable, 2.1V 2.0 2.1 2.2 V IOH I/O source current (PA) 3V VOH=0.9VDD -2.5 -5 — mA 5V -5 -11 — mA IOL1 I/O sink current (PA) 3V VOL=0.1VDD 7.5 15 — mA 5V 15 30 — mA IOL2 PA7 sink current 5V VOL=0.1VDD 2 3 — mA RPH Pull-high Resistance for I/O Ports 3V — 20 60 100 kΩ 5V — 10 30 50 kΩ A.C. Characteristics Ta=25°C Symbol Parameter Test Conditions Min. Typ. Max. Unit VDD Conditions fCPU Operating Clock — 2.3V~5.5V 8 8 8 MHz fHIRC System Clock (HIRC) 3/5V — -2% 8 +2% MHz 3/5V Ta=0°~70°C -5% 8 +5% MHz 3.0~5.5V Ta=0°~70°C -8% 8 +8% MHz 3.0~5.5V Ta=-40°~85°C -12% 8 +12% MHz fTIMER Timer I/P Frequency (TMR) 3.3~5.5V — 0 — 8 MHz tWDTOSC Watchdog oscillator period 3V — 45 90 180 μs 5V — 32 65 130 μs tRES External reset low pulse width — — 1 — — μs tSST System start-up timer period — wake-up from halt — 16 — tSYS tLVR Low Voltage Width to Reset — — 0.25 1 2 ms tRSTD System Reset Delay Time (All Reset) — — 25 50 100 ms Note:1.tSYS=1/fSYS 2.TomaintaintheaccuracyoftheinternalHIRCoscillatorfrequency,a0.1μFdecouplingcapacitorshould beconnectedbetweenVDDandVSSandlocatedasclosetothedeviceaspossible. |
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