WM9710

Production Data

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PD Rev 4.0 December 2003

24

Figure 12 illustrates a state when all the mixers should work with the static volume settings that

are contained in their associated registers. This is used when the user could be playing a CD (or

external LINEIN source) through WM9710 to the speakers but have most of the system in low

power mode. The procedure for this follows the previous except that the analogue mixer is never

shut down.

Note that in order to go into ultimate low power mode, PR4 and PR5 are required to be set which

turns off the oscillator circuit. Asserting SYNC resets the PR4 and PR5 bit and re-starts the

oscillator in the same way as the AC link is restarted.

REGISTER 28H – EXTENDED AUDIO ID

The Extended Audio ID register is a read only register that identifies which extended audio

features are supported (in addition to the original AC’97 features identified by reading the reset

register at index 00h). A non zero value indicates the feature is supported.

DATA BIT

FUNCTION

VALUE

VRA

Variable rate audio support

1

DRA

Double rate audio support

0

SPDIF

SPDIF transmitter supported

‘1’ = supported

VRM

Variable rate Mic ADC support

0

DSA0

DAC slot mapping control

See table below

DSA1

DAC slot mapping control

See table below

CDAC

Centre DAC support

0

SDAC

Surround DAC support

0

LDAC

LFE DAC support

0

AMAP

Slot mapping support for Codec ID

1

REV0

Revision number

1

REV1

Revision number

0

ID0

Codec configuration – pin 45 value

0 (Inverse of level at pin 45)

ID1

Codec configuration – fixed in WM9710

0

Table 13 Extended Audio ID Register

DSA1, DSA0

DAC SLOT MAPPING

00

Slots 3 & 4

01

Slots 7 & 8

10

Slots 6 & 9

11

Slots 10 & 11

Table 14 DAC Slot Mapping

DAC slot mapping to slots 7 and 8 or slots 6 and 9 cannot be used in variable rate mode (VRA=1)

for sample rates other than 48kHz.

REGISTER 2AH – EXTENDED AUDIO STATUS AND CONTROL REGISTER

The Extended Audio Status and Control Register is a read/write register that provides status and

control of the extended audio features. Note that SPDIF slot mapping default varies according to

codec pin configuration. See Table 2.

DATA BIT

FUNCTION

READ/WRITE

VRA

Enables variable rate audio mode

Read/write

SPDIF

SPDIF transmitter enable

Read/write

SPSA0

SPDIF slot assignment

Read/write

SPSA1

SPDIF slot assignment

Read/write

SPCV

SPDIF validity bit

Read

Table 15 Extended Audio Status and Control Register