WM9710

Production Data

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PD Rev 4.0 December 2003

16

SPDIF OR I

The WM9710 SPDIF output may be enabled in hardware by holding pin 44 (SPEN) high when

RESETB is taken high, or by writing to the SPDIF control bit in register 2Ah. If SPDIF pin 48 is

pulled high at start-up by a weak pull-up (e.g. 100k), then SPDIF capability bit in register 28h is

set to ‘0’, i.e. no SPDIF capability. This allows for stuffing options, so that when SPDIF external

components are not provided, the driver will see ‘no SPDIF capability’ and ‘grey out’ the relevant

boxes in the control panel.

Additionally the digital audio may be output in I

and outputting a frame clock or LRCLK onto pin 43. The data is clocked onto pin 44 using the

regular BITCLK at 256fs, which would also then be used as the MCLK if the data is taken to an

external DAC. Operation in this mode is selected by setting bit I

also available and can be output on SPDIF by setting bit I2S64 in register 74h. Note that I

operation is only supported for 48kHz operation. Hardware selection of SPDIF operation by pulling

pin SPEN ‘hi’ is compatible with I

hold SPEN high at start-up. The SPEN pin becomes I

the weak pull-up on this pin is overdriven.

For both SPDIF and I

link in the same slots as normal DAC data or may be sent in different slots. The output slots that

contain the SPDIF/I

with AC’97 rev2.2 specification with regard to slot mapping; therefore the default mode of

operation is to output SPDIF or I

slots currently in use. Alternatively if required, data may be mapped from any of the available

slots by selection using SPSA bits. The following table shows the default slot mapping for audio

DACs and SPDIF/I

SPEN STATE AT

START-UP

CODEC ID (PIN 45 STRAPPING)

AUDIO DAC SLOT

DEFAULT

SPDIF OR I

DATASLOT DEFAULT

‘lo’ (rev2.2 compliant)

‘hi’ = ID = 0 = primary

Slots 3 & 4 - front channels

Slots 7 & 8

‘lo’ (rev2.2 compliant)

‘lo’ = ID = 1 = secondary

Slots 7 & 8 – surround

Slots 6 & 9

‘hi’ (WM proprietary)

‘hi’ = ID = 0 = primary

Slots 3 & 4 - front channels

Slots 3 & 4

‘hi’ (WM proprietary)

‘lo’ = ID = 1 = secondary

Slots 7 & 8 – surround

Slots 3 & 4

Table 2 DAC and SPDIF Slot Mapping Defaults

However, an exception to the rev2.2 mapping table is made when SPDIF operation is enabled

using the SPEN hardware enable pin (being held high at start-up): in this case SPDIF data is

immediately output from the DAC primary slots 3 & 4. This allows for driver-less SPDIF operation,

where the SPDIF or I

Channel status and control bits output along with the SPDIF data are as set in the SPDIF control

register 3Ah. If required SPDIF data channel slot mapping may be then changed by setting

SPSA bits as required. See tables 18, 19 and 20 for further details.

A mode is provided where the output from the ADC is sent out as the SPDIF or I

above, rather than the data sent to the DACs over the AC link. This mode is enabled by setting bit

ADCO in register 5Ch. ADC data continues to be sent via the AC link to the controller as normal.

WM9710 supports SPDIF and I

in register 3Ah any value other than the default 48kHz rate will result in a fail to write, with the

48kHz value being returned on subsequent reads of these values.

PRIMARY/SECONDARY ID SUPPORT

WM9710 supports operation as either a primary or a secondary codec. Configuration of the

device as either a primary or as a secondary, is selected by tying the CID0 pin 45 on the package.

Fundamentally, a device identified as a primary (ID = 0, CID0 = ‘hi’) produces BITCLK as an

output, whereas a secondary (any other ID) must be provided with BITCLK as an input. This has

the obvious implication that if the primary device on an AC link is disabled, the secondary devices

cannot function. The AC’97 Revision 2.2 specification defines that the CID0 pin has inverting

sense, and are provided with internal weak pull ups. Therefore, if no connections are made to the

CID0 pin, then the pin pull hi and an ID = 0 is selected, i.e. primary. External connect to ground

(with pull-down from 0 to 10k

Ω) will select codec ID = ‘1’.