Control interface

VL53L0X

20/40

DocID029104 Rev 1

Figure 18. VL53L0X data format (sequential read)

3.1

Timing characteristics are shown in Table 3. Please refer to Figure 19 for an explanation of

the parameters used.

Timings are given for all PVT conditions.

S

Ac

ADDRESS[7:0]

INDEX[7:0]

Ac P

0x52 (write)

S

Ac

ADDRESS[7:0]

Am

DATA[7:0]

P

0x53 (read)

Am

DATA[7:0]

Am

DATA[7:0]

Am

DATA[7:0]

Am

DATA[7:0]

Symbol

Parameter

Minimum

Typical

Maximum

Unit

Operating frequency (Standard and

Fast mode)

0-

1. The maximum bus speed is also limited by the combination of 400pF load capacitance and pull-up resistor.

kHz

Clock pulse width low

1.3

-

-

μs

Clock pulse width high

0.6

-

-

μs

Pulse width of spikes which are

suppressed by the input filter

-

-

50

ns

Bus free time between transmissions

1.3

-

-

ms

Start hold time

0.26

-

-

μs

Start set-up time

0.26

-

-

μs

Data in hold time

0

-

0.9

μs

Data in set-up time

50

-

-

ns

SCL/SDA rise time

-

-

120

ns

SCL/SDA fall time

-

-

120

ns

Stop set-up time

0.6

-

-

μs

Ci/o

Input/output capacitance (SDA)

-

-

10

pF

Cin

Input capacitance (SCL)

-

-

4

pF

Load capacitance

-

125

400

pF