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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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HT69F360 датащи(PDF) 164 Page - Holtek Semiconductor Inc |
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HT69F360 датащи(HTML) 164 Page - Holtek Semiconductor Inc |
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164 / 235 page  Rev. 1.30 1�4 �ove��e� 1�� �01� Rev. 1.30 1�5 �ove��e� 1�� �01� HT69F340/HT69F350/HT69F360 TinyPowerTM I/O Flash MCU with LCD & EEPROM HT69F340/HT69F350/HT69F360 TinyPowerTM I/O Flash MCU with LCD & EEPROM UART Data Transfer Scheme TheblockdiagramshowstheoveralldatatransferstructurearrangementfortheUART.Theactual datatobetransmittedfromtheMCUisfirsttransferredtotheTXRregisterbytheapplication program.ThedatawillthenbetransferredtotheTransmitShiftRegisterfromwhereitwillbe shiftedout,LSBfirst,ontotheTXpinataratecontrolledbytheBaudRateGenerator.Onlythe TXRregisterismappedontotheMCUDataMemory,theTransmitShiftRegisterisnotmappedand isthereforeinaccessibletotheapplicationprogram. DatatobereceivedbytheUARTisacceptedontheexternalRXpin,fromwhereitisshiftedin, LSBfirst,totheReceiverShiftRegisterataratecontrolledbytheBaudRateGenerator.When theshiftregisterisfull,thedatawillthenbetransferredfromtheshiftregistertotheinternalRXR register,whereitisbufferedandcanbemanipulatedbytheapplicationprogram.OnlytheRXR registerismappedontotheMCUDataMemory,theReceiverShiftRegisterisnotmappedandis thereforeinaccessibletotheapplicationprogram. Itshouldbenotedthattheactualregisterfordatatransmissionandreception,althoughreferredto inthetext,andinapplicationprograms,asseparateTXRandRXRregisters,onlyexistsasasingle sharedregisterintheDataMemory.ThissharedregisterknownastheTXR/RXRregisterisusedfor bothdatatransmissionanddatareception. MSB LSB ………………………… T�ans�itte� Shift Registe� MSB LSB ………………………… Receive� Shift Registe� TX Pin RX Pin Baud Rate Gene�ato� TXR Registe� Buffe� MCU Data Bus RXR Registe� CLK CLK UART Data Transfer Scheme UART Status and Control Registers TherearefivecontrolregistersassociatedwiththeUARTfunction.TheUSR,UCR1andUCR2 registerscontroltheoverallfunctionoftheUART,whiletheBRGregistercontrolstheBaudrate. TheactualdatatobetransmittedandreceivedontheserialinterfaceismanagedthroughtheTXR/ RXRdataregisters. Register Name Bit 7 6 5 4 3 2 1 0 USR PERR �F FERR OERR RIDLE RXIF TIDLE TXIF UCR1 UARTE� B�O PRE� PRT STOPS TXBRK RX� TX� UCR� TXE� RXE� BRGH ADDE� WAKE RIE TIIE TEIE TXR/RXR D7 D� D5 D4 D3 D� D1 D0 BRG D7 D� D5 D4 D3 D� D1 D0 UART Register Summary |
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