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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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HT69F360 датащи(PDF) 157 Page - Holtek Semiconductor Inc |
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HT69F360 датащи(HTML) 157 Page - Holtek Semiconductor Inc |
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157 / 235 page  Rev. 1.30 15� �ove��e� 1�� �01� Rev. 1.30 157 �ove��e� 1�� �01� HT69F340/HT69F350/HT69F360 TinyPowerTM I/O Flash MCU with LCD & EEPROM HT69F340/HT69F350/HT69F360 TinyPowerTM I/O Flash MCU with LCD & EEPROM TheSIMDregisterisusedtostorethedatabeingtransmittedandreceived.Thesameregisterisused byboththeSPIandI2Cfunctions.BeforethedevicewritesdatatotheI2Cbus,theactualdatato betransmittedmustbeplacedintheSIMDregister.AfterthedataisreceivedfromtheI2Cbus,the devicecanreaditfromtheSIMDregister.AnytransmissionorreceptionofdatafromtheI2Cbus mustbemadeviatheSIMDregister. SIMD Register Bit 7 6 5 4 3 2 1 0 �a�e D7 D� D5 D4 D3 D� D1 D0 R/W R/W R/W R/W R/W R/W R/W R/W R/W POR × × × × × × × × “×”: unknown SIMA Register Bit 7 6 5 4 3 2 1 0 �a�e A� A5 A4 A3 A� A1 A0 — R/W R/W R/W R/W R/W R/W R/W R/W — POR 0 0 0 0 0 0 0 — bit7~1 A6~ A0:I2Cslaveaddress A6~A0istheI2Cslaveaddressbit6~bit0. TheSIMAregisterisalsousedbytheSPIinterfacebuthasthenameSIMC2.The SIMAregisteristhelocationwherethe7-bitslaveaddressoftheslavedeviceis stored.Bits7~1oftheSIMAregisterdefinethedeviceslaveaddress.Bit0isnot defined.Whenamasterdevice,whichisconnectedtotheI2Cbus,sendsoutan address,whichmatchestheslaveaddressintheSIMAregister,theslavedevicewill beselected.NotethattheSIMAregisteristhesameregisteraddressasSIMC2which isusedbytheSPIinterface. Bit0 Undefinedbit Thisbitcanbereadorwrittenbyusersoftwareprogram. I 2 C Da ta R egi st er (S IM D) Sl av e Ad dr es s Re gi st er (S IM A) Sh if t Re gi st er Di re ct io n Co nt ro l M U X Ad dr es s Ma tc h HA AS B it I 2 C In te rr up t Da ta i n M SB Da ta O u t MS B Tr an sm it /R ec ei ve Co nt ro l Un it 8- bi t D at a Co mp le te De te ct S ta rt o r St op Da ta B us Ad dr es s Co mp ar at or TX AK Re ad /w ri te S la ve SR W Bi t HB B Bi t HT X Bi t HC F Bi t D eboun ce Ci rc ui tr y SC L Pi n SD A Pi n f SY S SI MD BN C1 & SI MD BN C0 SI MT OF b it Ti me -o ut C ont ro l SI MT OF A ddr es s Ma tc h SI MT OE N f SU B I2C Block Diagram |
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